R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 346

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 9 16-Bit Timer Pulse Unit (TPU)
• When TGR is an input capture register
(1)
Figure 9.15 shows an example of the buffer operation setting procedure.
Rev. 3.00 Mar. 14, 2006 Page 308 of 804
REJ09B0104-0300
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in TGR is transferred to the buffer register.
This operation is illustrated in figure 9.14.
Example of Buffer Operation Setting Procedure
Input capture
signal
Buffer register
Figure 9.15 Example of Buffer Operation Setting Procedure
Select TGR function
Set buffer operation
<Buffer operation>
Buffer operation
Start count
Figure 9.14 Input Capture Buffer Operation
[1]
[2]
[3]
Timer general
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 to start the count
register
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
TCNT