R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 724
R5F61525
Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.R5F61525.pdf
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Section 19 Power-Down Modes
19.9
19.9.1
In software standby mode, the I/O port states are retained. Therefore, there is no reduction in
current consumption for the output current when a high-level signal is output.
19.9.2
Current consumption increases during the oscillation settling standby period.
19.9.3
Depending on the operating state of the DMAC, bit MSTPA13 may not be set to 1. Setting of the
DMAC module stop mode should be carried out only when the DMAC is not activated.
For details, refer to section 7, DMA Controller (DMAC).
19.9.4
Relevant interrupt operations cannot be performed in module stop mode. Consequently, if module
stop mode is entered when an interrupt has been requested, it will not be possible to clear the CPU
interrupt source or the DMAC activation source. Interrupts should therefore be disabled before
entering module stop mode.
19.9.5
MSTPCRA, MSTPCRB, and MSTPCRC should only be written to by the CPU.
Rev. 3.00 Mar. 14, 2006 Page 686 of 804
REJ09B0104-0300
Usage Notes
I/O Port Status
Current Consumption during Oscillation Settling Standby Period
DMAC Module Stop
On-Chip Peripheral Module Interrupts
Writing to MSTPCRA, MSTPCRB, and MSTPCRC
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