R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 823

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Item
7.4.3 Activation Sources
(2) Activation by On-Chip Module
Interrupt
7.4.9 DMA Basic Bus Cycle
Figure 7.23 Example of Bus
Timing of DMA Transfer
Section 8 I/O Ports
8.1 Register Descriptions
Figure 8.1 Port Block Diagram
8.1.5 Pull-Up MOS Control
Register (PnPCR) (n = D, H, J,
and K)
Table 8.3 Input Pull-Up MOS
State
Section 9 16-Bit Timer Pulse Unit
(TPU)
9.3.5 Timer Status Register (TSR)
•
Bit 5 to 0
166
182
211
214
292
to
295
Page Revision (See Manual for Details)
Added
The interrupt request selected as an activation source
can simultaneously generate interrupt requests to the
CPU. For details, see section 5, Interrupt Controller.
When the DMAC is activated with DTA = 1, the
interrupt request flag is automatically cleared by a DMA
transfer.
When the DMAC is activated with DTA = 0, the
interrupt request flag is not cleared by the DMAC. Thus
it should be cleared by the CPU.
Amended
HHWR, HLWR, LHWR
Amended
[Legend]
RDR:
RPOR:
RICR:
RPCR:
RODR:
Amended
Added
(When the CPU is used to clear this flag by writing 0
while the corresponding interrupt is enabled, be sure to
read the flag after writing 0 to it.)
Port
Port D
Port H
Port J
Port K
Pin State
On-chip peripheral module output
Port input
Port output
Port input
On-chip peripheral module output
Port input
On-chip peripheral module output
Port input
DR read
PORT read
ICR read
PCR read
ODR read
Rev. 3.00 Mar. 14, 2006 Page 785 of 804
OFF
Reset
OFF
OFF
OFF
OFF
OFF
OFF
OFF
REJ09B0104-0300
OFF
OFF
OFF
Software
Standby Mode
ON/OFF
OFF
ON/OFF
ON/OFF
ON/OFF