R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 646

• Manufacturer Part Number: R5F61525
• Description: 32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 17 Flash Memory (0.18-(m F-ZTAT Version)
8. The return value in the initialization program, the FPFR parameter is determined.
9. All interrupts and the use of a bus master other than the CPU are disabled during
10. FKEY must be set to H'5A and the user MAT must be prepared for programming.
11. The parameters required for programming are set. The start address of the programming
Rev. 3.00 Mar. 14, 2006 Page 608 of 804
REJ09B0104-0300
 Interrupts can be accepted during execution of the initialization program. Make sure the
programming/erasing. The specified voltage is applied for the specified time when
programming or erasing. If interrupts occur or the bus mastership is moved to other than the
CPU during programming/erasing, causing a voltage exceeding the specifications to be
applied, the flash memory may be damaged. Therefore, interrupts are disabled by setting bit 7
(I bit) in the condition code register (CCR) to B'1 in interrupt control mode 0 and by setting
bits 2 to 0 (I2 to I0 bits) in the extend register (EXR) to B'111 in interrupt control mode 2.
Accordingly, interrupts other than NMI are held and not executed. Configure the user system
so that NMI interrupts do not occur. The interrupts that are held must be executed after all
programming completes. When the bus mastership is moved to other than the CPU, such as to
the DMAC, the error protection state is entered. Therefore, make sure the DMAC does not
acquire the bus.
destination on the user MAT (FMPAR parameter) is set in general register ER1. The start
address of the program data storage area (FMPDR parameter) is set in general register ER0.
 Example of FMPAR parameter setting: When an address other than one in the user MAT
 Example of FMPDR parameter setting: When the storage destination for the program data
program storage area and stack area in the on-chip RAM and register values are not
overwritten.
area is specified for the start address of the programming destination, even if the
programming program is executed, programming is not executed and an error is returned to
the FPFR parameter. Since the program data for one programming operation is 128 bytes,
the lower eight bits of the address must be H'00 or H'80 to be aligned with the 128-byte
boundary.
is flash memory, even if the programming routine is executed, programming is not
executed and an error is returned to the FPFR parameter. In this case, the program data
must be transferred to the on-chip RAM and then programming must be executed.