R5F61525 RENESAS [Renesas Technology Corp], R5F61525 Datasheet - Page 397

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R5F61525

Manufacturer Part Number
R5F61525
Description
32-Bit CISC Microcomputer H8SX Family H8SX/1500 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
10.4.4
During non-overlapping operation, transfer from NDR to PODR is performed as follows:
• At compare match A, the NDR bits are always transferred to PODR.
• At compare match B, the NDR bits are transferred only if their value is 0. The NDR bits are
Figure 10.6 illustrates the non-overlapping pulse output operation.
Therefore, 0 data can be transferred ahead of 1 data by making compare match B occur before
compare match A.
The NDR contents should not be altered during the interval from compare match B to compare
match A (the non-overlapping margin).
This can be accomplished by having the TGIA interrupt handling routine write the next data in
NDR, or by having the TGIA interrupt activate the DMAC. Note, however, that the next data must
be written before the next compare match B occurs.
not transferred if their value is 1.
Pulse
output
pin
Non-Overlapping Pulse Output
Figure 10.6 Non-Overlapping Pulse Output
Normal output/inverted output
Q
NDER
Q
PODR
C
D
Section 10 Programmable Pulse Generator (PPG)
Rev. 3.00 Mar. 14, 2006 Page 359 of 804
Q
NDR
Compare match A
Compare match B
D
Internal data bus
REJ09B0104-0300

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