R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 11

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

5.3
5.4
5.5
5.6
5.7
5.8
5.9
5.10 Usage Notes ....................................................................................................................... 117
Section 6 Interrupt Controller (INTC) ...............................................................119
6.1
6.2
6.3
5.2.2
5.2.3
5.2.4
Address Errors ................................................................................................................... 105
5.3.1
5.3.2
Bus Error............................................................................................................................ 106
5.4.1
5.4.2
Register Bank Errors.......................................................................................................... 107
5.5.1
5.5.2
Interrupts............................................................................................................................ 108
5.6.1
5.6.2
5.6.3
Exceptions Triggered by Instructions ................................................................................ 111
5.7.1
5.7.2
5.7.3
5.7.4
5.7.5
5.7.6
When Exception Sources Are Not Accepted ..................................................................... 114
Stack Status after Exception Handling Ends...................................................................... 115
5.10.1 Value of Stack Pointer (SP) .................................................................................. 117
5.10.2 Value of Vector Base Register (VBR) .................................................................. 117
5.10.3 Address Errors Caused by Stacking of Address Error Exception Handling ......... 117
Features.............................................................................................................................. 119
Input/Output Pins ............................................................................................................... 121
Register Descriptions ......................................................................................................... 121
6.3.1
6.3.2
6.3.3
6.3.4
6.3.5
6.3.6
Types of Reset ...................................................................................................... 101
Power-On Reset .................................................................................................... 102
Manual Reset ........................................................................................................ 104
Address Error Sources .......................................................................................... 105
Address Error Exception Handling ....................................................................... 106
Bus Error Generation Source ................................................................................ 106
Bus Error Exception Handling.............................................................................. 106
Register Bank Error Sources................................................................................. 107
Register Bank Error Exception Handling ............................................................. 107
Interrupt Sources................................................................................................... 108
Interrupt Priority Level ......................................................................................... 109
Interrupt Exception Handling ............................................................................... 110
Types of Exceptions Triggered by Instructions .................................................... 111
Trap Instructions ................................................................................................... 112
Slot Illegal Instructions ......................................................................................... 112
General Illegal Instructions................................................................................... 112
Integer Division Instructions................................................................................. 113
Floating-point Operation Instruction .................................................................... 113
Interrupt Priority Registers 01, 02, 05 to 16 (IPR01, IPR02, IPR05 to IPR16) .... 123
Interrupt Control Register 0 (ICR0)...................................................................... 125
Interrupt Control Register 1 (ICR1)...................................................................... 126
Interrupt Control Register 2 (ICR2)...................................................................... 127
IRQ Interrupt Request Register (IRQRR)............................................................. 127
PINT Interrupt Enable Register (PINTER)........................................................... 129
Rev. 2.00 Sep. 07, 2007 Page xi of xxxii