R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 19

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

13.7 Interrupt Sources................................................................................................................ 619
13.8 Usage Notes ....................................................................................................................... 620
Section 14 Watchdog Timer (WDT)..................................................................625
14.1 Features.............................................................................................................................. 625
14.2 Input/Output Pin................................................................................................................. 626
14.3 Register Descriptions ......................................................................................................... 627
14.4 WDT Usage ....................................................................................................................... 633
14.5 Usage Notes ....................................................................................................................... 636
Section 15 Realtime Clock (RTC) .....................................................................639
15.1 Features.............................................................................................................................. 639
15.2 Input/Output Pin................................................................................................................. 641
15.3 Register Descriptions ......................................................................................................... 641
13.7.1 Interrupt Sources................................................................................................... 619
13.7.2 A/D Converter Activation..................................................................................... 620
13.8.1 Notes on Setting Cycle.......................................................................................... 620
13.8.2 Conflict between TCNT Write and Clear ............................................................. 620
13.8.3 Conflict between TCNT Write and Increment...................................................... 621
13.8.4 Conflict between TCOR Write and Compare Match ............................................ 621
13.8.5 Conflict between Compare Matches A and B....................................................... 622
13.8.6 Switching of Internal Clocks and TCNT Operation.............................................. 622
13.8.7 Mode Setting with Cascaded Connection ............................................................. 624
13.8.8 Module Standby Setting........................................................................................ 624
13.8.9 Interrupts in Module Standby Mode ..................................................................... 624
14.3.1 Watchdog Timer Counter (WTCNT).................................................................... 627
14.3.2 Watchdog Timer Control/Status Register (WTCSR)............................................ 628
14.3.3 Watchdog Reset Control/Status Register (WRCSR) ............................................ 630
14.3.4 Notes on Register Access...................................................................................... 631
14.4.1 Canceling Software Standby Mode....................................................................... 633
14.4.2 Changing the Frequency ....................................................................................... 633
14.4.3 Using Watchdog Timer Mode .............................................................................. 634
14.4.4 Using Interval Timer Mode .................................................................................. 635
14.5.1 Timer Variation..................................................................................................... 636
14.5.2 Prohibition against Setting H'FF to WTCNT........................................................ 636
14.5.3 System Reset by WDTOVF Signal....................................................................... 636
14.5.4 Manual Reset in Watchdog Timer Mode .............................................................. 637
15.3.1 64-Hz Counter (R64CNT) .................................................................................... 642
15.3.2 Second Counter (RSECCNT) ............................................................................... 643
15.3.3 Minute Counter (RMINCNT) ............................................................................... 644
Rev. 2.00 Sep. 07, 2007 Page xix of xxxii