R5S72611 RENESAS [Renesas Technology Corp], R5S72611 Datasheet - Page 1312

• Manufacturer Part Number: R5S72611
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7260 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

Section 31 Electrical Characteristics
31.3.9
Table 31.13 SCIF Module Timing
Conditions: PV
Note: t
Rev. 2.00 Sep. 07, 2007 Page 1280 of 1312
REJ09B0320-0200
Item
Input clock cycle
Input clock rise time
Input clock fall time
Input clock width
Transmit data delay time
(Clocked synchronous)
Receive data setup time
(Clocked synchronous)
Receive data hold time
(Clocked synchronous)
pcyc
SCIF Module Timing
Figure 31.32 SCIF Input/Output Timing in Clocked Synchronous Mode
indicates a peripheral clock (Pφ) cycle.
SCK
TxD
(data transmit)
RxD
(data receive)
PV
PV
CC
CC
SS
= V
= V
− 0.3 V ≤ AV
(Clocked synchronous)
(Asynchronous)
SCK
SS
CC
R = PLLV
R = PLLV
Figure 31.31 SCK Input Clock Timing
CC
SS
CC
≤ PV
= AV
t
= 3.0 V to 3.6 V, AV
TXD
t
SCKW
CC
, AV
SS
t
Scyc
= 0 V
Symbol Min.
t
t
t
t
t
t
t
Scyc
SCKr
SCKf
SCKW
TXD
RXS
RXH
ref
= 3.0 V to AV
12
4
—
—
0.4
—
4 t
1 t
t
RXS
t
SCKr
pcyc
pcyc
t
Scyc
CC
t
+ 15 
+ 15 
RXH
= 3.0 V to 3.6 V,
CC
,
Max.


1.5
1.5
0.6
3 t
t
SCKf
pcyc
+ 15 ns
t
Unit
t
t
t
t
ns
ns
pcyc
pcyc
pcyc
pcyc
Scyc
Figure
Figure 31.31
Figure 31.32