A3P060-1VQ144T ACTEL [Actel Corporation], A3P060-1VQ144T Datasheet - Page 6

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A3P060-1VQ144T

Manufacturer Part Number
A3P060-1VQ144T
Description
Automotive ProASIC3 Flash Family FPGAs
Manufacturer
ACTEL [Actel Corporation]
Datasheet
Automotive ProASIC3 Device Family Overview
1 -2
techniques have been used to make invasive attacks extremely difficult. The Automotive ProASIC3
family, with FlashLock and AES security, is unique in being highly resistant to both invasive and
noninvasive attacks. Your valuable IP is protected and secure. An Automotive ProASIC3 device
provides the most impenetrable security for programmable logic designs.
Single Chip
Flash-based FPGAs store their configuration information in on-chip flash cells. Once programmed,
the configuration data is an inherent part of the FPGA structure, and no external configuration
data needs to be loaded at system power-up (unlike SRAM-based FPGAs). Therefore, flash-based
Automotive ProASIC3 FPGAs do not require system configuration components such as EEPROMs or
microcontrollers to load device configuration data. This reduces bill-of-materials costs and PCB
area, and increases security and system reliability.
Live at Power-Up
The Actel flash-based Automotive ProASIC3 devices support Level 0 of the LAPU classification
standard. This feature helps in system component initialization, execution of critical tasks before
the processor wakes up, setup and configuration of memory blocks, clock generation, and bus
activity management. The LAPU feature of flash-based Automotive ProASIC3 devices greatly
simplifies total system design and reduces total system cost, often eliminating the need for CPLDs
and external clock generation PLLs. In addition, glitches and brownouts in system power will not
corrupt the Automotive ProASIC3 device's flash configuration, and unlike SRAM-based FPGAs, the
device will not have to be reloaded when system power is restored. This enables the reduction or
complete removal of the configuration PROM, expensive voltage monitor, brownout detection,
and clock generator devices from the PCB design. Flash-based Automotive ProASIC3 devices
simplify total system design and reduce cost and design risk while increasing system reliability and
improving system initialization time.
Firm-Error Immunity
Firm errors occur most commonly when high-energy neutrons, generated in the upper atmosphere,
strike a configuration cell of an SRAM FPGA. The energy of the collision can change the state of the
configuration cell and thus change the logic, routing, or I/O behavior in an unpredictable way.
These errors are impossible to prevent in SRAM FPGAs. The consequence of this type of error can be
a complete system failure. Firm errors do not exist in the configuration memory of Automotive
ProASIC3 flash-based FPGAs. Once it is programmed, the flash cell configuration element of
Automotive ProASIC3 FPGAs cannot be altered by high-energy neutrons and is therefore immune
to them. Recoverable (or soft) errors occur in the user data SRAM of all FPGA devices. These can
easily be mitigated by using error detection and correction (EDAC) circuitry built into the FPGA
fabric.
Low Power
Flash-based Automotive ProASIC3 devices exhibit very low power characteristics, similar to those of
an ASIC, making them an ideal choice for power-sensitive applications. Automotive ProASIC3
devices have only a very limited power-on current surge and no high-current transition period,
both of which occur on many FPGAs.
Automotive ProASIC3 devices also have low dynamic power consumption to further maximize
power savings.
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