A3P060-1VQ144T ACTEL [Actel Corporation], A3P060-1VQ144T Datasheet - Page 89

• Manufacturer Part Number: A3P060-1VQ144T
• Description: Automotive ProASIC3 Flash Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Clock Conditioning Circuits
Table 2-116 • Automotive ProASIC3 CCC/PLL Specification
Parameter
Clock Conditioning Circuitry Input Frequency f
Clock Conditioning Circuitry Output Frequency f
Delay Increments in Programmable Delay Blocks
Number of Programmable Values in Each Programmable Delay Block
Input Period Jitter
CCC Output Peak-to-Peak Period Jitter F
Acquisition Time
Tracking Jitter
Output Duty Cycle
Delay Range in Block: Programmable Delay 1
Delay Range in Block: Programmable Delay 2
Delay Range in Block: Fixed Delay
Notes:
1. This delay is a function of voltage and temperature. See
2. T
3. Tracking jitter is defined as the variation in clock edge position of PLL outputs with reference to the PLL
input clock edge. Tracking jitter does not measure the variation in PLL output period, which is covered by
the period jitter parameter.
0.75 MHz to 24 MHz
24 MHz to 100 MHz
100 MHz to 250 MHz
250 MHz to 350 MHz
(A3P250 and A3P1000 only)
(all other dies)
(A3P250 and A3P1000 only)
(all other dies)
J
= 25°C, V
CCC Electrical Specifications
Timing Characteristics
4
CC
= 1.5 V
1, 2
LockControl = 0
LockControl = 1
LockControl = 0
LockControl = 1
LockControl = 0
LockControl = 1
LockControl = 0
LockControl = 1
CCC_OUT
1, 2
1, 2
IN_CCC
1, 2
OUT_CCC
v1.0
Table 2-5 on page 2-5
Automotive ProASIC3 DC and Switching Characteristics
Minimum Typical Maximum Units
Network
1 Global
0.50%
1.00%
1.75%
2.50%
Used
0.025
0.75
48.5
1.5
0.6
Max Peak-to-Peak Period Jitter
for deratings.
160
2.2
Networks
3 Global
0.70%
1.20%
2.00%
5.60%
Used
300
300
300
51.5
5.56
5.56
350
350
6.0
1.6
1.6
1.6
0.8
1.5
32
MHz
MHz
ms
ns
ns
ns
ns
%
ps
ns
µs
µs
µs
ns
ns
ns
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