A3P060-1VQ144T ACTEL [Actel Corporation], A3P060-1VQ144T Datasheet - Page 62

• Manufacturer Part Number: A3P060-1VQ144T
• Description: Automotive ProASIC3 Flash Family FPGAs
• Manufacturer: ACTEL [Actel Corporation]

Automotive ProASIC3 DC and Switching Characteristics
Table 2-85 • LVDS
Figure 2-13 • B-LVDS/M-LVDS Multipoint Application Using LVDS I/O Buffers
2 -5 0
Speed Grade
Std.
–1
Note:
R
T
Z
Z
Z
stub
0
0
For specific junction temperature and voltage supply levels, refer to
values.
Receiver
+
R
R
S
B-LVDS/M-LVDS
Bus LVDS (B-LVDS) and Multipoint LVDS (M-LVDS) specifications extend the existing LVDS standard
to high-performance multipoint bus applications. Multidrop and multipoint bus configurations
may contain any combination of drivers, receivers, and transceivers. Actel LVDS drivers provide the
higher drive current required by B-LVDS and M-LVDS to accommodate the loading. The drivers
require series terminations for better signal quality and to control voltage swing. Termination is
also required at both ends of the bus since the driver can be located anywhere on the bus. These
configurations can be implemented using the TRIBUF_LVDS and BIBUF_LVDS macros along with
appropriate terminations. Multipoint designs using Actel LVDS macros can achieve up to 200 MHz
with a maximum of 20 loads. A sample application is given in
buffer delays are available in the LVDS section in
Example: For a bus consisting of 20 equidistant loads, the following terminations provide the
required differential voltage, in worst-case Industrial operating conditions, at the farthest receiver:
R
LVPECL
Low-Voltage Positive Emitter-Coupled Logic (LVPECL) is another differential I/O standard. It
requires that one data bit be carried through two signal lines. Like LVDS, two pins are needed. It
also requires external resistor termination.
The full implementation of the LVDS transmitter and receiver is shown in an example in
on page
one receiver macro, three board resistors at the transmitter end, and one resistor at the receiver
end. The values for the three driver resistors are different from those used in the LVDS
implementation because the output standard specifications are different.
Automotive-Case Conditions: T
-
S
EN
R
Z
= 60 Ω and R
S
stub
2-51. The building blocks of the LVPECL transmitter-receiver are one transmitter macro,
Z
Z
Z
0
0
stub
Transceiver
+
T
R
T
= 70 Ω, given Z
S
-
EN
R
Z
S
stub
Z
Z
Z
0
0
t
stub
0.53
DOUT
0.63
0
J
Driver
+
= 115°C, Worst-Case V
= 50 Ω (2") and Z
R
D
S
-
EN
R
Z
S
stub
v1.0
1.98
1.68
Z
Z
t
Z
0
0
DP
stub
Table 2-84 on page
Receiver
+
stub
R
R
S
-
= 50 Ω (~1.5").
EN
R
CC
Z
S
stub
= 1.425 V, Worst-Case V
0.05
0.04
t
DIN
...
Table 2-5 on page 2-5
Figure
2-49.
Z
Z
2-13. The input and output
0
0
Transceiver
1.73
1.47
t
PY
+
R
T
S
-
EN
R
S
CCI
= 2.3 V
for derating
BIBUF_LVDS
Figure 2-14
Units
Z
Z
ns
ns
0
0
R
T