MCF5232 ETC, MCF5232 Datasheet - Page 54

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MCF5232

Manufacturer Part Number
MCF5232
Description
Integrated Microprocessor Hardware Specification
Manufacturer
ETC
Datasheet

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NOTES:
1
Preliminary Electrical Characteristics
The values in
6.13 JTAG and Boundary Scan Timing
54
Num
J10
J11
J12
J13
J14
JTAG_EN is expected to be a static signal. Hence, specific timing is not associated with it.
J1
J2
J3
J4
J5
J6
J7
J8
J9
QSPI_CS[1:0]
TCLK Frequency of Operation
TCLK Cycle Period
TCLK Clock Pulse Width
TCLK Rise and Fall Times
Boundary Scan Input Data Setup Time to TCLK Rise
Boundary Scan Input Data Hold Time after TCLK Rise
TCLK Low to Boundary Scan Output Data Valid
TCLK Low to Boundary Scan Output High Z
TMS, TDI Input Data Setup Time to TCLK Rise
TMS, TDI Input Data Hold Time after TCLK Rise
TCLK Low to TDO Data Valid
TCLK Low to TDO High Z
TRST Assert Time
TRST Setup Time (Negation) to TCLK High
QSPI_DOUT
QSPI_CLK
QSPI_DIN
Table 42
QS1
MCF523x Integrated Microprocessor Hardware Specification, Rev. 1.3
correspond to
Characteristics
QS3
Table 43. JTAG and Boundary Scan Timing
Figure
1
QS2
Figure 23. QSPI Timing
23.
Preliminary
Symbol
t
t
t
t
t
t
t
t
TAPBST
TAPBHT
TRSTST
TRSTAT
TDODV
TDODZ
f
t
t
BSDST
BSDHT
t
t
t
JCYC
JCYC
BSDV
BSDZ
JCRF
JCW
QS4
Min
100
DC
26
26
10
10
4
0
4
0
0
4
0
0
Max
1/4
33
33
26
3
8
QS5
-
-
-
-
-
-
-
-
Freescale Semiconductor
f
Unit
t
sys/2
CYC
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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