MCF5232 ETC, MCF5232 Datasheet - Page 6

• Manufacturer Part Number: MCF5232
• Description: Integrated Microprocessor Hardware Specification
• Manufacturer: ETC

Overview
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Fast Ethernet Controller (FEC)
— 10 BaseT capability, half duplex or full duplex
— 100 BaseT capability, half duplex or full duplex
— On-chip transmit and receive FIFOs
— Built-in dedicated DMA controller
— Memory-based flexible descriptor rings
— Media independent interface (MII) to external transceiver (PHY)
FlexCAN Modules (up to 2)
— Full implementation of the CAN protocol specification version 2.0B
— Flexible Message Buffers (MBs), totalling up to 16 message buffers of 0–8 bytes data length
— Unused MB space can be used as general purpose RAM space
— Listen only mode capability
— Content-related addressing
— Three programmable mask registers: global (for MBs 0-13), special for MB14 and special for
— Programmable transmit-first scheme: lowest ID or lowest buffer number
— “Time stamp” based on 16-bit free-running timer
— Global network time, synchronized by a specific message
Three Universal Asynchronous Receiver Transmitters (UARTs)
— 16-bit divider for clock generation
— Interrupt control logic
— Maskable interrupts
— DMA support
— Data formats can be 5, 6, 7 or 8 bits with even, odd or no parity
— Up to 2 stop bits in 1/16 increments
— Error-detection capabilities
— Modem support includes request-to-send (UnRTS) and clear-to-send (UnCTS) lines
— Transmit and receive FIFO buffers
I
— Interchip bus interface for EEPROMs, LCD controllers, A/D converters, and keypads
2
C Module
masters (e.g., DMA, FEC)
– Standard Data and Remote Frames (up to 109 bits long)
– Extended Data and Remote Frames (up to 127 bits long)
– 0–8 bytes data length
– Programmable bit rate up to 1 Mbit/sec
each, configurable as Rx or Tx, all supporting standard and extended messages
MB15
MCF523x Integrated Microprocessor Hardware Specification, Rev. 1.3
Preliminary
Freescale Semiconductor