M306V5EESP Mitsubishi, M306V5EESP Datasheet - Page 32

• Manufacturer Part Number: M306V5EESP
• Description: SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER and ON-SCREEN DISPLAY CONTROLLER
• Manufacturer: Mitsubishi

32
Table 2.5.4 Operating modes dictated by settings of system clock control registers 0 and 1
2.5.6 Status Transition of BCLK
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CM17
Power dissipation can be reduced and low-voltage operation achieved by changing the count source for
BCLK. Table 2.5.4 shows the operating modes corresponding to the settings of system clock control
registers 0 and 1.
After a reset, operation defaults to division by 8 mode. When shifting to stop mode, the main clock division
select bit 0 (bit 6 at address 0006
clock .
(1) Division by 2 mode
(2) Division by 4 mode
(3) Division by 8 mode
(4) Division by 16 mode
(5) No-division mode
0
1
1
0
The main clock is divided by 2 to obtain the BCLK.
The main clock is divided by 4 to obtain the BCLK.
The main clock is divided by 8 to obtain the BCLK. Note that oscillation of the main clock must have
stabilized before transferring from this mode to another mode.
The main clock is divided by 16 to obtain the BCLK.
The main clock is used as the BCLK.
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CM16
1
0
1
0
CM06
0
0
1
0
0
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER with CLOSED CAPTION DECODER
16
) is set to “1”. The following shows the operational modes of internal
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CM04
Operating mode of BCLK
Division by 16 mode
Division by 2 mode
Division by 4 mode
Division by 8 mode
No-division mode
and ON-SCREEN DISPLAY CONTROLLER
MITSUBISHI MICROCOMPUTERS
M306V5ME-XXXSP
M306V5EESP
Rev. 1.0