K9F1208Q0A-XXB0 Samsung semiconductor, K9F1208Q0A-XXB0 Datasheet - Page 12

• Manufacturer Part Number: K9F1208Q0A-XXB0
• Description: 512Mb/256Mb 1.8V NAND Flash Errata
• Manufacturer: Samsung semiconductor

K9F5608U0C-VCB0,VIB0,FCB0,FIB0
K9F5608Q0C-DCB0,DIB0,HCB0,HIB0
K9F5608U0C-YCB0,YIB0,PCB0,PIB0
K9F5608U0C-DCB0,DIB0,HCB0,HIB0
VALID BLOCK
NOTE :
1. The
2. The 1st block, which is placed on 00h block address, is fully guaranteed to be a valid block, does not require Error Correction.
3.
AC TEST CONDITION
(K9F56XXX0C-XCB0 :TA=0 to 70 C, K9F56XXX0C-XIB0:TA=-40 to 85 C
CAPACITANCE
NOTE : Capacitance is periodically sampled and not 100% tested.
MODE SELECTION
NOTE : 1. X can be V
Program/Erase Characteristics
K9F56XXQ0C : Vcc=1.70V~1.95V , K9F56XXU0C : Vcc=2.7V~3.6V unless otherwise noted)
Valid Block Number
Input Pulse Levels
Input Rise and Fall Times
Input and Output Timing Levels
K9F56XXQ0C:Output Load (VccQ:1.8V +/-10%)
K9F56XXU0C:Output Load (VccQ:3.0V +/-10%)
K9F56XXU0C:Output Load (VccQ:3.3V +/-10%)
Input/Output Capacitance
Input Capacitance
Program Time
Dummy Busy Time for the Lock or Lock-tight Block
Number of Partial Program Cycles
in the Same Page
Block Erase Time
Minimum 1004 valid blocks are guaranteed for each contiguous 128Mb memory space.
CLE
blocks is presented with both cases of invalid blocks considered. Invalid blocks are defined as blocks that contain one or more bad bits
or program factory-marked bad blocks. Refer to the attached technical notes for a appropriate management of invalid blocks.
H
H
X
X
X
X
X
L
L
L
L
L
K9F56XXX0C
2. WP should be biased to CMOS high or CMOS low for standby.
ALE
X
Parameter
H
H
X
X
X
X
L
L
L
L
L
(1)
Item
IL
CE
Parameter
H
X
X
X
X
L
L
L
L
L
L
L
or V
may include invalid blocks when first shipped. Additional invalid blocks may develop while being used. The number of valid
(
T
Parameter
IH.
A
=25 C, V
WE
H
H
X
X
X
X
X
CC
RE
=1.8V/3.3V, f=1.0MHz)
H
H
H
H
H
H
H
X
X
X
X
Symbol
Symbol
N
C
C
VB
I/O
IN
Spare Array
Main Array
0V/V
PRE
K9F5616Q0C-DCB0,DIB0,HCB0,HIB0
K9F5616U0C-YCB0,YIB0,PCB0,PIB0
K9F5616U0C-DCB0,DIB0,HCB0,HIB0
X
X
X
X
X
X
X
X
X
X
X
CC
(2)
Test Condition
0V/V
1 TTL GATE and CL=30pF
WP
X
X
H
H
H
X
X
X
H
H
V
L
V
CC
2013
IN
Min
IL
Symbol
=0V
=0V
(2)
t
t
t
PROG
Nop
K9F56XXQ0C
LBSY
BERS
11
0V to VccQ
Data Input
Data Output
During Read(Busy) on K9F5608U0C_Y,P or K9F5608U0C_V,F
During Read(Busy) on the devices except K9F5608U0C_Y,P and
K9F5608U0C_V,F
During Program(Busy)
During Erase(Busy)
Write Protect
Stand-by
VccQ/2
Read Mode
Write Mode
5ns
-
Min
-
-
-
-
-
Typ.
Min
-
-
-
Command Input
Address Input(3clock)
Command Input
Address Input(3clock)
Typ
200
5
2
-
-
Mode
1 TTL GATE and CL=100pF
1 TTL GATE and CL=50pF
FLASH MEMORY
2048
Max
Max
10
10
K9F56XXU0C
0.4V to 2.4V
Max
500
10
2
3
3
1.5V
5ns
Blocks
.
Unit
Unit
pF
pF
Do not erase
cycles
cycles
Unit
ms
s
s