GS88018AT-133 ETC, GS88018AT-133 Datasheet - Page 20
GS88018AT-133
Manufacturer Part Number
GS88018AT-133
Description
512K x 18/ 256K x 32/ 256K x 36 9Mb Sync Burst SRAMs
Manufacturer
ETC
Datasheet
1.GS88018AT-133.pdf
(26 pages)
- Current page: 20 of 26
- Download datasheet (757Kb)
Rev: 1.02 9/2002
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Pipelined SCD Read Cycle Timing
BW
DQ
A
A
–
ADSC
A
ADSP
–
BW
0
ADV
DQ
GW
–
BW
CK
An
E
E
E
D
G
D
1
2
3
Hi-Z
tS
tS tH
tS tH
tS
tS
Single Read
RD1
tH
tH
tH
tOLZ
tLZ
tS
tS
tS
tH
tKQ
tOE
tS tH
RD2
Q1
E
2
tKH
20/26
A
and E
tOHZ
tKL
3
only sampled with ADSP or ADSC
Burst Read
tKC
tKQX
Q2
GS88018/32/36AT-250/225/200/166/150/133
ADSP is blocked by E inactive
E
A
1
Suspend Burst
masks ADSP
Q2
B
Q2c
ADSC initiated read
RD3
© 2001, Giga Semiconductor, Inc.
Q2
Deselected with E
tH
tH
D
tKQX
Q3
A
tHZ
2
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