HYS64T128020GU Infineon, HYS64T128020GU Datasheet - Page 14
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HYS64T128020GU
Manufacturer Part Number
HYS64T128020GU
Description
240-Pin Unbuffered DDR2 SDRAM Modules
Manufacturer
Infineon
Datasheet
1.HYS64T128020GU.pdf
(67 pages)
- Current page: 14 of 67
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Table 6
Abbreviation
I
O
I/O
AI
PWR
GND
NC
Table 7
Abbreviation
SSTL
LV-CMOS
OD
Data Sheet
CMOS
Abbreviations for Buffer Type
Abbreviations for Buffer Type
HYS[64T[3200/6400/12802]0/72T[6400/12802]0][G/H]U–[3.7/5]–A
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Connected
Description
Serial Stub Terminated Logic (SSTL_18)
Low Voltage CMOS
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and
tristate, and allows multiple devices to share as a wire-OR.
14
512 Mbit DDR2 SDRAM
09122003-GZEK-H4J6
Rev. 0.87, 2004-06
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