UPD64084 NEC, UPD64084 Datasheet - Page 36

• Manufacturer Part Number: UPD64084
• Description: THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
• Manufacturer: NEC

15. I
15.1 Basic Specification
communication between ICs and a serial clock line (SCL) for establishing sync in communication.
36
SDA (Master)
The I
The following procedure is used to transfer data from the master IC to a slave IC.
<1> Start condition : To start communication, hold the SCL at a high level, then pull down the SDA from a high to a
<2> Data transfer
<3> Stop condition : To terminate communication, pull up the SDA from a low to a high upon acknowledgment,
SDA (Slave)
2
C BUS INTERFACE
2
C bus is a two-wire bi-directional serial bus developed by Philips. It consists of a serial data line (SDA) for
SCL
Start condition
0.6
MIN.
s
Figure 15-2. Start Condition, Data Transfer, and Stop Condition Formats
: To transfer data, pull up the SCL from a low to a high, while holding the current state of the
Master IC
low level.
SDA. Data transfer is carried out in units of 9 bits, that is, 8 data bits (D7 to D0, MSB first) plus
an acknowledgment bit (ACK). A selected slave IC sets the SDA to a low when it receives bit
9 to send acknowledgment.
while keeping the SCL at a high.
D7
0.1
1.3
MIN.
MIN.
s
s
SCL
SDA
0.6
MIN.
D6
0.1
MIN.
s
s
Serial data line
Serial clock line
D5
0 ns MIN.
Figure 15-1. I
3.3 V supply voltage
D4
Data Sheet S16021EJ2V0DS
2
C Bus Interface
D1
Data acceptance
D0
Hi-Z
ACK
SCL
SCL
SDA
SDA
D7
Slave IC
Slave IC
D0
Hi-Z
ACK
PD64084
Stop condition
0.6
MIN.
s