UPD64084 NEC, UPD64084 Datasheet - Page 42

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UPD64084

Manufacturer Part Number
UPD64084
Description
THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
Manufacturer
NEC
Datasheet

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42
01
SA
D7-D6
D5-D4
D3-D2
D1-D0
Bit
CLKS
Specifies whether to
force use of the system
clock.
NSDS
Specifies whether to
force
standard/nonstandard
signal processing.
MSS
Specifies whether to
force inter-frame or inter-
line processing.
KILS
Specifies whether to
force killer processing
Name and function
Table 15-2. Write Register Functions (2/14)
00: Automatic setting (in an operation mode specified by NRMD)
01: Forced burst locked clocking
1x: Forced line (horizontal) locked clocking
Caution If the specified setting does not match the input
00: Adaptive processing (performed according to whether a
01: Forced standard signal processing (performed regardless of
10: Forced horizontal sync nonstandard signal processing
11: Forced vertical sync nonstandard signal processing (forced
Caution If the specified setting does not match the input
00: Adaptive processing (performed according to the LINE pin
01: Forced inter-frame processing (performed according to the
1x: Forced inter-line processing
00: Adaptive processing (performed according to the KIL pin
01: Internal killer detection is not used (processing is performed
1x: Forced killer processing
In killer processing, subtraction of the C signal from Comp. Signal
is disabled.
nonstandard signal is detected)
whether a nonstandard signal is detected)
inter-line processing)
input and motion detection signal)
LINE pin input)
input and internal killer detection results)
according to the KIL pin input only).
Data Sheet S16021EJ2V0DS
signal, a malfunction may occur.
signal, a malfunction may occur.
Description
Typical
value
PD64084
00
00
00
01
Initial
value
00
00
00
01

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