UPD64084 NEC, UPD64084 Datasheet - Page 46

• Manufacturer Part Number: UPD64084
• Description: THREE-DIMENSIONAL Y/C SEPARATION LSI WITH ON-CHIP MEMORY
• Manufacturer: NEC

46
07
SA
D7
D6
D5
D4
D3-D2
D1-D0
Bit
ID1ENON
Specifies whether to
superimpose ID-1
specification ID signal.
ID1ENW0A1
Specifies whether to set
bit A1 of ID-1 word 0.
ID1ENW0A2
Specifies whether to set
bit A2 of ID-1 word 0.
CLK8OFF
Specifies the state of the
CLK8 pin output.
ST1S
Specifies internal signal
monitor output for the
ST1 pin.
ST0S
Specifies internal signal
monitor output for the
ST0 pin.
Name and function
Table 15-2. Write Register Functions (6/14)
0: Through (no superimposition)
1: Forced superimposition
Caution Do not set this bit to 1 during no-signal state.
0: 0 (transmission aspect of 4:3)
1: 1 (transmission aspect of 16:9)
0: 0 (image display format = normal)
1: 1 (image display format = letter box)
0: Active-low (to output 8f
1: Fixed to low level (to reduce radiation noise)
00: I
01: Internal ADC clamp pulse (active-high)
10: Composite sync (active-low)
11: H sync (active-high)
00: Reserved
01: External ADC clamp pulse (active-high)
10: HV blanking (active-high)
11: V sync (active-low)
2
C SDA inversed pulse
Data Sheet S16021EJ2V0DS
SC
Description
clock pulse)
Typical
value
PD64084
1
-
-
-
-
-
Initial
value
00
00
0
0
0
0