EVAL-ADV7320EB AD [Analog Devices], EVAL-ADV7320EB Datasheet - Page 18
![no-image](/images/no-image-200.jpg)
EVAL-ADV7320EB
Manufacturer Part Number
EVAL-ADV7320EB
Description
Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
Manufacturer
AD [Analog Devices]
Datasheet
1.EVAL-ADV7320EB.pdf
(88 pages)
- Current page: 18 of 88
- Download datasheet (2Mb)
ADV7320/ADV7321
Pin No.
62–58,
55–51
33
47, 35
22
21
20
1
10, 56
41
46
34
31
19
64
Mnemonic
S9 to S0
RESET
R
SCLK
SDA
ALSB
V
V
V
V
EXT_LF
RTC_SCR_TR
I
GND_IO
2
SET1
DD_IO
DD
AA
REF
C
, R
SET2
Input/Output
I
I
I
I
I/O
I
P
P
P
I/O
I
I
I
Description
SD or Progressive Scan/HDTV Input Port for Cr[Red/V] Data in 4:4:4 Input Mode. LSB is set up
on Pin S0. For 8-bit data input, LSB is set up on S2.
This input resets the on-chip timing generator and sets the ADV7320/ADV7321 into default
register setting. RESET is an active low signal.
A 3040 Ω resistor must be connected from this pin to AGND and is used to control the
amplitudes of the DAC outputs.
I
I
TTL Address Input. This signal sets up the LSB of the I
I
Power Supply for Digital Inputs and Outputs.
Digital Power Supply.
Analog Power Supply.
Optional External Voltage Reference Input for DACs or Voltage Reference Output (1.235 V).
External Loop Filter for the Internal PLL.
Multifunctional Input. Real-time control (RTC) input, timing reset input, subcarrier reset input.
This input pin must be tied high (V
Digital Input/Output Ground.
2
2
2
C Port Serial Interface Clock Input.
C Port Serial Data Input/Output.
C filter is activated, which reduces noise on the I
Rev. 0 | Page 18 of 88
DD_IO
) for the ADV7320/ADV7321 to interface over the I
2
C interface.
2
C address. When this pin is tied low, the
2
C port.
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