EVAL-ADV7320EB AD [Analog Devices], EVAL-ADV7320EB Datasheet - Page 52

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EVAL-ADV7320EB

Manufacturer Part Number
EVAL-ADV7320EB
Description
Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
Manufacturer
AD [Analog Devices]
Datasheet
ADV7320/ADV7321
SD Brightness Detect
[Subaddress 0x7A]
The ADV7320/ADV7321 allow monitoring the brightness level
of the incoming video data. Brightness detect is a read-only
register.
Double Buffering
[Subaddress 0x13, Bit 7; Subaddress 0x48, Bit 2]
Double buffered registers are updated once per field upon the
falling edge of the Vsync signal. Double buffering improves the
overall performance because modifications to register settings
will not be made during active video, but take effect upon the
start of the active video.
100 IRE
0 IRE
NTSC WITHOUT PEDESTAL
VALUE ADDED
NO SETUP
Figure 69. Examples of Brightness Control Values
Rev. 0 | Page 52 of 88
POSITIVE SETUP
VALUE ADDED
Double buffering can be activated on the following HD
registers: HD gamma A and gamma B curves and HD CGMS
registers.
Double buffering can be activated on the following SD registers:
SD gamma A and gamma B curves, SD Y scale, SD U scale, SD V
scale, SD brightness, SD closed captioning, and SD Macrovision
Bits 5 to 0.
NEGATIVE SETUP
VALUE ADDED
+7.5 IRE
–7.5 IRE

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