EVAL-ADV7320EB AD [Analog Devices], EVAL-ADV7320EB Datasheet - Page 73

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EVAL-ADV7320EB

Manufacturer Part Number
EVAL-ADV7320EB
Description
Multiformat 216 MHz Video Encoder with Six NSV 12-Bit DACs
Manufacturer
AD [Analog Devices]
Datasheet
APPENDIX 5—SD TIMING MODES
[Subaddress 0x4A]
MODE 0 (CCIR-656)—SLAVE OPTION
(TIMING REGISTER 0 TR0 = X X X X X 0 0 0)
The ADV7320/ADV7321 are controlled by the SAV (start active
video) and EAV (end active video) time codes in the pixel data.
All timing information is transmitted using a 4-byte
synchronization pattern. A synchronization pattern is sent
immediately before and after each line during active picture and
retrace. If Pins S_VSYNC , S_HSYNC , and S_BLANK are not
used, they should be tied high during this mode. Blank output
is available.
NTSC/PAL M SYSTEM
(525 LINES/60Hz)
(625 LINES/50Hz)
INPUT PIXELS
PAL SYSTEM
ANALOG
VIDEO
Y
END OF ACTIVE
VIDEO LINE
C
r
Y
F
F
4 CLOCK
4 CLOCK
EAV CODE
0
0
0
0
X
Y
8
0
1
0
Figure 109. SD Slave Mode 0
8
0
1
0
Rev. 0 | Page 73 of 88
ANCILLARY DATA
0
0
268 CLOCK
280 CLOCK
F
F
(HANC)
F
F
A
B
A
B
A
B
8
0
1
0
8
0
1
0
SAV CODE
4 CLOCK
F
F
4 CLOCK
START OF ACTIVE
0
0
VIDEO LINE
0
0
X
Y
C
b
Y C
1440 CLOCK
1440 CLOCK
r
Y
C
b
ADV7320/ADV7321
Y
C
r
Y
C
b

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