74LCX373WM Fairchild Semiconductor, 74LCX373WM Datasheet
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74LCX373WM
Specifications of 74LCX373WM
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74LCX373WM Summary of contents
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... To ensure the high impedance state during power up or down, OE should be tied to V resistor: the minimum value of the resistor is determined by the current-sourcing capability of the driver. Ordering Information Order Package Number Number 74LCX373WM M20B 74LCX373SJ M20D (2) 74LCX373BQX MLP20B 74LCX373MSA MSA20 74LCX373MTC MTC20 Note: 2 ...
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... GND 10 Pad Assignments for DQFN GND LE (Top View) Pin Descriptions Pin Names Description D –D Data Inputs Latch Enable Input OE 3-STATE Output Enable Input O –O 3-STATE Latch Outputs 0 7 ©2006 Fairchild Semiconductor Corporation 74LCX373 Rev. 1.8.0 Logic Symbols Truth Table HIGH Voltage ...
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... Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©2006 Fairchild Semiconductor Corporation 74LCX373 Rev. 1.8 www.fairchildsemi.com ...
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... OL T Free-Air Operating Temperature Input Edge Rate Notes Absolute Maximum Rating must be observed Unused inputs must be held HIGH or LOW. They may not float. ©2006 Fairchild Semiconductor Corporation 74LCX373 Rev. 1.8.0 Conditions Output in 3-STATE (3) Output in HIGH or LOW State –0 GND I V GND ...
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... Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device. The specification applies to any outputs switching in the same direction, either HIGH-to-LOW ( LOW-to-HIGH (t OSHL ©2006 Fairchild Semiconductor Corporation 74LCX373 Rev. 1.8.0 V (V) Conditions CC 2.3– ...
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... Dynamic Switching Characteristics Symbol Parameter V Quiet Output Dynamic Peak V OLP V Quiet Output Dynamic Valley V OLV Capacitance Symbol Parameter C Input Capacitance IN C Output Capacitance OUT C Power Dissipation Capacitance PD ©2006 Fairchild Semiconductor Corporation 74LCX373 Rev. 1.8.0 V (V) Conditions CC 3 50pF 3.3V 2 30pF 2.5V 3 50pF ...
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... DATA V mo OUT 3-STATE Output Low Enable and Disable Times for Logic Figure 2. Waveforms (Input Characteristics 1MHz, t Symbol ©2006 Fairchild Semiconductor Corporation 74LCX373 Rev. 1.8.0 (Generic for LCX Family 500 DUT C L 500 includes probe and jig capacitance) L Test Switch Open ...
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... Schematic Diagram (Generic for LCX Family) Input Stage Data ESD D2 N+/P– Input Stage Enable ESD D4 N+/P– ©2006 Fairchild Semiconductor Corporation 74LCX373 Rev. 1.8 GTO™ Output D6 N+/P– N5 www.fairchildsemi.com ...
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... BQX Leader (Start End) Trailer (Hub End) Tape Dimensions inches (millimeters) Reel Dimensions inches (millimeters) Tape Size A 12mm 13.0 (330.0) 0.059 (1.50) ©2006 Fairchild Semiconductor Corporation 74LCX373 Rev. 1.8.0 Tape Number Cavities 125 (typ) Carrier 3000 75 (typ 0.512 (13.00) 0.795 (20.20) 2.165 (55.00) 0.488 (12.4) ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...