74ALVC162373T Fairchild Semiconductor, 74ALVC162373T Datasheet - Page 2

IC LATCH TRANSP 16BIT 48TSSOP

74ALVC162373T

Manufacturer Part Number
74ALVC162373T
Description
IC LATCH TRANSP 16BIT 48TSSOP
Manufacturer
Fairchild Semiconductor
Series
74ALVCr
Datasheet

Specifications of 74ALVC162373T

Logic Type
D-Type Transparent Latch
Circuit
8:8
Output Type
Tri-State
Voltage - Supply
1.65 V ~ 3.6 V
Independent Circuits
2
Delay Time - Propagation
1ns
Current - Output High, Low
12mA, 12mA
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
48-TSSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74ALVC162373TX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
www.fairchildsemi.com
Connection Diagram
Functional Description
The 74ALVC162373 contains sixteen edge D-type latches
with 3-STATE outputs. The device is byte controlled with
each byte functioning identically, but independent of the
other. Control pins can be shorted together to obtain full
16-bit operation. The following description applies to each
byte. When the Latch Enable (LE
the I
transparent, i.e., a latch output will change state each time
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays.
n
enters the latches. In this condition the latches are
n
) input is HIGH, data on
2
Truth Tables
H
L
X
Z
O
its I input changes. When LE
information that was present on the I inputs a setup time
preceding the HIGH-to-LOW transition on LE
3-STATE outputs are controlled by the Output Enable
(OE
the 2-state mode. When OE
are in the high impedance mode but this does not interfere
with entering new data into the latches.
0
Previous O
n
LOW Voltage Level
High Impedance
HIGH Voltage Level
Immaterial (HIGH or LOW, inputs may not float)
) input. When OE
LE
LE
X
H
H
X
H
H
L
L
0
1
2
before HIGH-to-LOW of Latch Enable
Inputs
Inputs
OE
OE
n
H
H
L
L
L
L
L
L
is LOW the standard outputs are in
1
2
n
is HIGH, the standard outputs
n
is LOW, the latches store
I
I
8
0
–I
X
H
X
X
H
X
–I
L
L
15
7
Outputs
Outputs
O
O
8
0
O
O
–O
Z
H
Z
H
–O
L
L
0
0
15
7
n
. The

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