MM74C905N Fairchild Semiconductor, MM74C905N Datasheet - Page 7

IC REGISTER SUCC-APPROX 24-DIP

MM74C905N

Manufacturer Part Number
MM74C905N
Description
IC REGISTER SUCC-APPROX 24-DIP
Manufacturer
Fairchild Semiconductor
Series
74Cr
Datasheet

Specifications of MM74C905N

Logic Type
Register, Successive Approximation
Output Type
Standard
Number Of Elements
1
Number Of Bits Per Element
12
Function
Universal
Voltage - Supply
3 V ~ 15 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
24-DIP (0.600", 15.24mm)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74C905
74C905N

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MM74C905N
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
Company:
Part Number:
MM74C905N
Quantity:
9
Typical Applications
Definition of Terms
CP: Register clock input.
CC: Conversion complete—this output remains at V
during a conversion and goes to V
is complete.
D: Serial data input—connected to comparator output in A-
to-D applications.
E: Register enable —this input is used to expand the
length of the register. When E is at V
V
sion E must be connected to V
OUT(1)
and inhibits conversion. When not used for expan-
12-Bit Successive Approximation A-to-D Converter, Operating in
Continuous Mode, Drives the 50k/100k Ladder Network Directly
IN(0)
12-Bit Successive Approximation A-to-D Converter,
OUT(0)
(GND).
Operating in Continuous 8–Bit Truncated Mode
IN(1)
when conversion
Q11 is forced to
OUT(1)
7
Q11: True register MSB output.
Q11: Complement of register MSB output.
Qi (i
S: Start input—holding start input at V
clock period will initiate a conversion by setting MSB (Q11)
at V
up time requirements are met, a conversion may be initi-
ated by holding start input at V
period.
DO: Serial data output—D input delayed by one clock
period.
OUT(0)
0 to 11): Register outputs.
and all other output (Q10–Q0) at V
IN(0)
for less than one clock
IN(0)
www.fairchildsemi.com
for at least one
OUT(1)
. If set-

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