ZL50011/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50011/GDC Datasheet - Page 14

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ZL50011/GDC

Manufacturer Part Number
ZL50011/GDC
Description
Flexible 512 Channel DX with on-chip DPLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
Pin Description (continued)
LQFP Pin
103 - 106
107 - 110
123 - 125
128 - 130
131 - 134
137 - 139
140 - 142
147 - 149
150 - 152
143, 144
153, 154
Number
97 - 100
117, 118
53 - 56
63 - 66
73 - 76
87 - 90
93 - 96
114
115
116
111
C3, D3, E4, E3
H12, G12, G11
M4, K5, J5, L4
L6, K6, M6, L7
L8, M9, L9, L5
K10, L12, K12
D10, E10, F11
F12, E12, E11
J3, K1, L1, J2
L10, L11, K11
J11, J10, J9,
H9, G9, H11
M2, K4, M3,
M7, M8, K8,
F3, G3, G1,
LBGA Ball
M10, M11
D12, C12
G10, F10
Number
M12
H10
J12
G2
M5
K2
K9
K7
STOHZ 12 -15
STOHZ 8 - 11
STOHZ 0 - 3
STOHZ 4 - 7
D12 - D15
STi14 - 15
STi11- 13
STi8 - 10
D8 - D11
A8 - A11
D0 - D3
D4 - D7
STi0 - 2
STi3 - 5
STi6 - 7
A0 - A1
A2 - A4
A5 - A7
Name
R/W
DTA
CS
DS
Zarlink Semiconductor Inc.
ZL50011
Serial Output Streams High Impedance Control 0 to 15 (5 V
Tolerant Three-state Outputs): These pins are used to enable
(or disable) external three-state buffers. When an output
channel is in the high impedance state, the STOHZ drives high
for the duration of the corresponding output channel. When the
STo channel is active, the STOHZ drives low for the duration of
the corresponding output channel.
Data Bus 0 - 15 (5 V Tolerant I/Os): These pins form the 16-bit
data bus of the microprocessor port.
Data Transfer Acknowledgment (5 V Tolerant Three-state
Output): This active low output indicates that a data bus
transfer is complete. A pull-up resistor is required to hold this
pin at HIGH level.
Chip Select (5 V Tolerant Input): Active low input used by the
microprocessor to enable the microprocessor port access.
Read/Write (5 V Tolerant Input): This input controls the
direction of the data bus lines (D0-D15) during a
microprocessor access.
Data Strobe (5 V Tolerant Input): This active low input works
in conjunction with CS to enable the microprocessor port read
and write operations.
Address 0 - 11 (5 V Tolerant Inputs): These pins form the
12-bit address bus to the internal memories and registers.
Serial Input Streams 0 to 15 (5 V Tolerant Inputs): The data
rate of these input streams can be selected independently
using the stream input control registers. In the 2.048 Mbps
mode, these pins accept serial TDM data streams at
2.048 Mbps with 32 channels per stream. In the 4.096 Mbps
mode, these pins accept serial TDM data streams at
4.096 Mbps with 64 channels per stream. In the 8.192 Mbps
mode, these pins accept serial TDM data streams at
8.192 Mbps with 128 channels per stream.
Unused serial input pins are required to connect to either Vdd
or ground, through an external pull-up resistor or external
pull-down resistor.
14
Description
Data Sheet

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