ZL50011/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50011/GDC Datasheet - Page 25
ZL50011/GDC
Manufacturer Part Number
ZL50011/GDC
Description
Flexible 512 Channel DX with on-chip DPLL
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL50011GDC.pdf
(83 pages)
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2.3.5
This feature is used to delay the output data bit of individual output streams with respect to the output frame
boundary. Each output stream can have its own bit delay value.
By default, all output streams have zero bit delay such that Bit 7 is the first bit that appears after the output frame
boundary (see Figure 18 on page 25). Different output bit delay can be set by programming Bit 2 to 4 in the Stream
Output Offset Registers. The output bit delay can vary from 0 to 7 bits.
2.3.6
In addition to the output bit delay, the device is also capable of performing fractional output bit advancement. This
feature offers a better resolution for the output bit delay adjustment. The fractional output bit advancement is useful
in compensating for various parasitic loadings on the serial data output pins.
By default, all output streams have zero fractional bit advancement such that Bit 7 is the first bit that appears after
the output frame boundary as shown in Figure 19. The fractional output bit advancement is enabled by Bit 0 to 1 in
the Stream Output Offset Registers. The fractional bit advancement can vary from 0, 1/4, 1/2 or 3/4 bit.
Fractional Bit Adv. = 1/4 bit
Note: Last Channel = 31, 63, 127 for 2.048 Mbps, 4.096 Mbps and 8.192 Mbps mode respectively
Fractional Bit Adv. = 0
Note: X = 0 to 15
Output Bit Delay Programming
Fractional Output Bit Advancement Programming
Note: Last Channel = 31, 63, 127 for 2.048 Mbps, 4.096 Mbps and 8.192 Mbps mode respectively
Bit Delay = 1
Bit Delay = 0
Note: Y = 0 to 15
(Default)
SToX
SToX
FPo
(Default)
SToY
SToY
Output Frame Boundary
FPo
Figure 19 - Fractional Output Bit Advancement Timing Diagram
3
4
Last Channel
Last Channel
2
3
Fractional Bit Advancement = 1/4 bit
Bit 1
1
2
Figure 18 - Output Bit Delay Timing Diagram
Bit 1
0
1
Last Channel
Output Frame Boundary
0
7
Last Channel
Zarlink Semiconductor Inc.
Bit 0
6
7
Bit Delay = 1
ZL50011
5
6
Bit 0
25
Ch0
4
5
Ch0
3
4
Bit 7
2
3
1
2
Bit 7
Ch0
0
1
7
0
Ch0
6
7
Bit 6
Bit 6
Ch1
5
6
Ch1
4
5
Data Sheet
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