ZL50011/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50011/GDC Datasheet - Page 15

• Manufacturer Part Number: ZL50011/GDC
• Description: Flexible 512 Channel DX with on-chip DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Pin Description (continued)
LQFP Pin
119 - 122,
159, 160
Number
1, 2, 29,
39 - 42,
79 - 82,
157
158
LBGA Ball
Number
C5, C6
D11
C11
RESET
Name
TDo
NC
Zarlink Semiconductor Inc.
ZL50011
Device Reset (5 V Tolerant Input): This input (active LOW)
puts the device in its reset state that disables the STo0 - 15
drivers and drives the STOHZ 0 - 15 outputs to high. It also
clears the device registers and internal counters. To ensure
proper reset action, the reset pin must be low for longer than
1 ms. Upon releasing the reset signal to the device, the first
microprocessor access can take place after 600 µs due to the
time required to stabilize the APLL and crystal oscillator blocks
from the power down state.
Test Serial Data Out (3 V Tolerant Three-state Output):
JTAG serial data is output on this pin on the falling edge of
TCK. This pin is held in high impedance state when JTAG is not
enabled.
No Connection Pins. These pins are not connected to the
device internally.
15
Description
Data Sheet