ZL50011/GDC ZARLINK [Zarlink Semiconductor Inc], ZL50011/GDC Datasheet - Page 35

• Manufacturer Part Number: ZL50011/GDC
• Description: Flexible 512 Channel DX with on-chip DPLL
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

2.10.2
The Skew Control circuit delays the selected reference input with an 8 tap tapped delay line (see Figure 26). The
nominal delay between taps is 1.9 ns. Thus the selected reference can be delayed by 0 to 13.3 ns in steps of 1.9 ns
(0 to 7 steps). The output tap is selected by SKEW_CONTROL which corresponds to the SKC2-0 bits of the DPLL
Output Adjustment (DPOA) register. Skewing the reference will cause the feedback signal in the PLL block
(FEEDBACK in Figure 27 on page 36) to be delayed by the skew amount with respect to the original reference.
This will cause the DPLL output to be delayed by the skew amount. Hence the ST-BUS outputs will be delayed by
the skew amount.
2.10.3
The Reference Monitor circuit continuously monitors the selected reference and reports the reference’s validity.
The output signal is FAIL_REF which is available at the DHKR register PFD bit. A logic high indicates that the
reference has become invalid. The validity criteria depends on the frequency programmed for the reference. The
reference must meet all criteria applicable to its frequency, which are:
•
•
•
The "minimum 90 ns" check is performed regardless of the programmed frequency. Both the logic high and
low duration of the reference must be at least 90 ns.
The "period in specified range" check is performed regardless of the programmed frequency. Each period
must be within a range. For 1.544 MHz and 2.048 MHz, the range is 1-1/4 to 1+1/4 nominal period. For
8 kHz, the range is 1-1/32 to 1+1/32 nominal period.
If the programmed frequency is 1.544 MHz or 2.048 MHz, the "64 periods in specified range" check will be
performed. The time taken for 64 consecutive cycles must be between 62 and 66 periods of the programmed
frequency.
Skew Control Circuit
Reference Monitor Circuit
reference
input
SKEW_CONTROL
Figure 26 - Skew Control Circuit Diagram
Zarlink Semiconductor Inc.
ZL50011
35
delayed
reference
Data Sheet