AM79C930VC/W AMD [Advanced Micro Devices], AM79C930VC/W Datasheet - Page 105
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AM79C930VC/W
Manufacturer Part Number
AM79C930VC/W
Description
PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
Manufacturer
AMD [Advanced Micro Devices]
Datasheet
1.AM79C930VCW.pdf
(161 pages)
- Current page: 105 of 161
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TCR1: Transmit Configuration
This register is the Transmit Configuration register.
CONFIGURATION REGISTER INDEX:
Bit
7
6–5
4
3–2
1–0
TXENDCB
Reserved
TXDLC
Name
TXDC
TXDI
Reset Value
01b
0
0
0
0
P R E L I M I N A R Y
01h
Description
Transmit Enable DC Bias Control. When TXENDCB is set to a 1,
then the DC Bias Control algorithm is enabled. When TXENDCB is
reset to a 0, then the DC Bias Control algorithm is disabled.
Reserved. These bits may be written with any value. The value writ-
ten to these bits will be returned when read. The value of these bits
will not affect device function.
Transmit Data Invert. When set to a 1, the outgoing transmit serial
data stream is inverted. When set to a 0, the outgoing transmit se-
rial data stream is not inverted.
Transmit Data Pin Control. These bits are used to control the state
of the TXDL pin when no transmit activity is present. The following
interpretations have been assigned to these bits:
Transmit Data Pin Control. These bits are used to control the state
of the TXDL pin when no transmit activity is present. The following
interpretations have been assigned to these bits:
SD[1:0]
Am79C930
00
01
10
11
TXDLC[1:0]
TXDC[1:0]
00
01
10
11
00
01
10
11
Search for 16 bit Start of Frame Delimiter
Search for 24 bit Start of Frame Delimiter
Search for 8 bit Start of Frame Delimiter
Start of Frame Detect Operation
Start of Frame Detect Off
last bit transmitted
last bit transmitted
high impedance
TXDATA Pin
TXDATA pin
Default state
default state
high
high
low
low
low
TCR9, TCR10
Programmed
TCR8, TCR9
Register
TCR10
TCR10
None
AMD
105
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