AM79C930VC/W AMD [Advanced Micro Devices], AM79C930VC/W Datasheet - Page 131

• Manufacturer Part Number: AM79C930VC/W
• Description: PCnet-Mobile Single-Chip Wireless LAN Media Access Controller
• Manufacturer: AMD [Advanced Micro Devices]

AC CHARACTERISTICS
5.0 AND 3.3 V PCMCIA INTERFACE
ABSOLUTE MAXIMUM RATINGS
Storage Temperature:
Ambient Temperature Under Bias:
Supply Voltage to AVSS
or DVSS (AVDD, DVDD):
Stresses above those listed under Absolute Maximum
Ratings may cause permanent device failure. Functionality at
or above these limits is not implied. Exposure to Absolute
Maximum Ratings for extended periods may affect
device reliability.
PCMCIA MEMORY READ ACCESS
Notes:
1. Assumes no wait state access is programmed.
2. The max value for this parameter assumes the following worst case situation:
3. Parameter is not included in production test.
Value
0
1
2
3
4
5
6
7
Parameter
Symbol
tWTLWTH
tGLWTV
tQVWTH
tGLQNZ
tAVQV
tGHAX
tGHEH
tGLQV
tGHQZ
tAVGL
tELQV
tELGL
Worst Case
FLASH and SRAM wait states set at “3.”
Host performs PCMCIA WRITE cycle at same time that Am79C930 embedded 80188 controller begins
instruction fetch cycle to FLASH memory.
PCMCIA WRITE cycle is posted internal to Am79C930 device, pending the completion of the embedded 80188
controller access.
Host performs PCMCIA READ cycle immediately following completion of PCMCIA WRITE cycle.
After completion of first embedded 80188 access to FLASH, posted PCMCIA WRITE executes to SRAM;
PCMCIA READ stycle is being held in wait state.
After completion of posted ISA WRITE cycle, new embedded 80188 access to FLASH begins.
After completion of second embedded 80188 access to FLASH, PCMCIA READ cycle is allowed to proceed onto
memory bus to SRAM; host is still held in wait state.
At SRAM READ cycle completion, data is delivered to PCMCIA bus and wait state is exited.
Parameter Description
Address access time
Address setup to OE
Address hold from OE
CE access time
CE setup to OE
CE hold from OE
CE hold from WE
OE acess time
WAIT valid from OE
WAIT pulse width
Data Bus driven from OE
Data setup to WAIT
Data disabled from OE
. . . . . . . . . . . .
. . . . . . . . . . . . . .
. . .
(READ) or
(WRITE)
–65 to +150*C
–65 to +125*C
–0.3 to +6 V
P R E L I M I N A R Y
Am79C930
Test Conditions
Note 1
Note 1
Note 1
Notes 2, 3
Note 3
Note 3
OPERATING RANGES
Commercial (C) Devices
Temperature (T
Supply Voltages (V
Supply Voltages
(AV
All inputs within the range: V
V
for a given input pin. (See section on power supply
pin descriptions.)
CL = 50 pF unless otherwise noted
Operating ranges define those limits between which the func-
tionality of the device is guaranteed.
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DD
DD
– where V
, V
DD5
)
. . . . . . . . . . . . . . . . . . . . . . . .
SS
A
and V
)
. . . . . . . . . . . . . . . . .
CC
, V
Min
20
20
DD
0
5
0
0
0
0
0
DDT
are appropriate reference pins
, V
SS
DDU1
– 0.5 V V
53 X TCLKIN
, V
Max
DDU2
550
550
200
35
90
, V
3.0 V to 5.25 V
IN
0 C to + 70 C
DDM
V
+5 V
AMD
, V
DD
Unit
+ 0.1 X
ns
ns
ns
ns
ns
ns
ns
ns
ns
DDP
ns
ns
ns
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