HI-3110 HOLTIC [Holt Integrated Circuits], HI-3110 Datasheet - Page 23

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HI-3110

Manufacturer Part Number
HI-3110
Description
Avionics CAN Controller with Integrated Transceiver
Manufacturer
HOLTIC [Holt Integrated Circuits]
Datasheet
The ERR register indicates CAN bus status and protocol errors. It is read only. All bits default to 0 at power up and maintain their
current status following reset. Bits 4:0 are reset following a host read.
Bit Name
7
6
5
4
3
2
1
0
ERROR REGISTER: ERR
(Read only)
(Read, SPI Op-code 0xDC)
BUSOFF
TXERRP
RXERRP
BITERR
FRMERR
CRCERR
ACKERR
STUFERR
R/W
R
R
R
R
R
R
R
R
Default Description
0
0
0
0
0
0
0
0
Bus-off status indicator.
This bit is set when TEC > 255. Node is in bus off condition. The bit is reset by HI-3110 when a
successful bus recovery sequence is detected (128 x 11 consecutive recessive bits). d the
FILHIT3:0 bits will reflect this value.
Transmit Error Passive status indicator.
This bit is set when 128
Receive Error Passive status indicator.
This bit is set when 128
Bit Error.
A bit error was detected in a transmitted frame (the bit observed on the bus was opposite to
what was expected).
Form Error.
A Form error was detected in a receive frame.
CRC Error.
A CRC error was detected in a receive frame.
Acknowledgement Error.
An ACK error was detected in a receive frame.
Stuff Error.
A bit stuffing error was detected in a received frame.
HOLT INTEGRATED CIRCUITS
£
£
HI-3110
MSB
7
TEC
REC
23
6
£
£
5
255
255.
4
.
3
2
1
LSB
0

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