HYS64V64220GU INFINEON [Infineon Technologies AG], HYS64V64220GU Datasheet

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HYS64V64220GU

Manufacturer Part Number
HYS64V64220GU
Description
3.3 V 64M x 64/72-Bit, 512MByte SDRAM Modules 168-pin Unbuffered DIMM Modules
Manufacturer
INFINEON [Infineon Technologies AG]
Datasheet
• SDRAM Performance:
3.3 V 64M x 64/72-Bit, 512MByte SDRAM Modules
168-pin Unbuffered DIMM Modules
• 168-pin unbuffered 8 Byte Dual-In-Line
• PC100-222, PC133-333 & PC133-222
• Two bank 64M
• Optimized for byte-write non-parity and ECC
• JEDEC standard Synchronous DRAMs
• Programmed Latencies:
Description
The HYS 64V64220GU and HYS 72V64220GU are industry standard 168-pin 8-byte Dual in-line
Memory Modules (DIMMs) which are organized as 64M
memory arrays designed with 256M Synchronous DRAMs (SDRAMs) for non-parity and ECC
applications. The DIMMs use “-7” speed sorted 256 Mbit Synchronous DRAMs (SDRAMs) to meet
the PC133-222 requirements, “-7.5” for PC133-333 and “-8” components for PC100-222
applications. Decoupling capacitors are mounted on the PC board. The PC board design is
according to INTEL’s module specification. The DIMMs have a serial presence detect, implemented
with a serial E
manufacturer and the second 128 bytes are available to the end user. All Infineon 168-pin DIMMs
provide a high performance, flexible 8-byte interface in a 133.35 mm long footprint, with 1.25“
(31.75 mm) height.
INFINEON Technologies
f
t
SDRAM Modules for PC main memory
applications using 256Mbit technology.
versions
organization
applications
(SDRAM)
Product Speed
-7
-7.5
-8
CK
AC
Clock Frequency (max.)
Clock Access time
2
PROM using the 2-pin I
PC133
PC133
PC100
64 and 64M
CL
2
3
2
t
2
3
2
72
RCD
2
C protocol. The first 128 bytes are utilized by the DIMM
t
2
3
2
RP
-7
PC133
133
5.4
1
• Single + 3.3 V ( 0.3 V) power supply
• Programmable CAS Latency, Burst Length,
• Auto Refresh (CBR) and Self Refresh
• Decoupling capacitors mounted on substrate
• All inputs and outputs are LVTTL compatible
• Serial Presence Detect with E
• Uses Infineon 256 Mbit SDRAM components
• Fully PC board layout compatible to INTEL’s
• Gold contact pad, card size:
and Wrap Sequence (Sequential &
Interleave)
in 32M
packages
Rev. 1.0 module specification
133.35 mm
(JEDEC MO-161-BA)
-7.5
PC133
133
5.4
64 and 64M
8 organization and TSOPII-54
31.75 mm
PC100
100
6
-8
HYS 64/72V64220GU
72 in two banks high speed
SDRAM-Modules
Unit
MHz
ns
4.00 mm
2
PROM
9.01

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HYS64V64220GU Summary of contents

Page 1

... The DIMMs use “-7” speed sorted 256 Mbit Synchronous DRAMs (SDRAMs) to meet the PC133-222 requirements, “-7.5” for PC133-333 and “-8” components for PC100-222 applications. Decoupling capacitors are mounted on the PC board. The PC board design is according to INTEL’s module specification. The DIMMs have a serial presence detect, implemented 2 with a serial E PROM using the 2-pin I manufacturer and the second 128 bytes are available to the end user ...

Page 2

... Descriptions 64 2 bank SDRAM module 72 2 bank SDRAM module 64 2 bank SDRAM module 72 2 bank SDRAM module 64 2 bank SDRAM module 72 2 bank SDRAM module Clock Input Chip Select Power (+ 3.3 V) Ground Clock for Presence Detect Serial Data Out for Presence Detect ...

Page 3

... V 120 A7 SS CLK2 121 A9 N.C. 122 BA0 WP 123 A11 SDA 124 V DD SCL 125 CLK1 126 A12 HYS 64/72V64220GU SDRAM-Modules PIN# Symbol 127 V SS 128 CKE0 129 CS3 130 DQMB6 131 DQMB7 132 N.C. 133 V DD 134 N.C. 135 N.C. 136 CB6 137 CB7 ...

Page 4

... RAS, CAS, WE CKE0 CKE1 Note: D16 & D17 is only used in the x72 ECC version and all resistor values are 10 except otherwise noted. Block Diagram: 64M x 64/72 Two Bank SDRAM DIMM Modules INFINEON Technologies CS DQM DQMB4 DQ0-DQ7 DQ(39:32 DQM ...

Page 5

... Input Capacitance (SCL, SA0-2) Input/Output Capacitance INFINEON Technologies Symbol IN, OUT STG 3 MHz 5 HYS 64/72V64220GU SDRAM-Modules Limit Values Unit min. max. – 1.0 V 4.6 – 1.0 4 -55 +150 – – Symbol Limit Values min. max ...

Page 6

... Self Refresh Mode, CKE = 0.2 V Notes 1. All values are shown per one SDRAM component. 2. These parameters depend on the cycle rate. These values are measured at 133 MHz operation frequency for -7 & -7.5 and at 100 MHz for -8 modules. Input signals are changed once during t = infinity. ...

Page 7

... – RCD t 15 – – RAS t 60 – – RRD t 1 – CCD 7 HYS 64/72V64220GU SDRAM-Modules Limit Values -7.5 -8 PC133-333 PC100-222 7.5 – 10 – 10 – 10 – – 133 – 100 – 100 – 100 – 5.4 – 6 – 6 – 6 2.5 – ...

Page 8

... – DQW V = 2.4 V with the timing referenced to the 1.4 V crossover – 0.5) ns must be added to this parameter – has to be added to this parameter HYS 64/72V64220GU SDRAM-Modules Limit Values -7.5 -8 PC133-333 PC100-222 – 64 – – 1 – 3 – 3 – 0 – ...

Page 9

... CLOCK 1 INPUT OUTPUT Serial Presence Detect A serial presence detect storage device - E about the module configuration, speed, etc. is written into the E production using a serial presence detect protocol (I INFINEON Technologies t CH 2 ...

Page 10

... SPD-Table for 64M x 64 (512 MByte non-ECC) Modules HYS64V64220GU Byte Description # 0 Number of SPD Bytes 1 Total Bytes in Serial PD 2 Memory Type 3 Number of Row Addresses 4 Number of Column Addresses 5 Number of DIMM Banks 6 Module Data Width 7 Module Data Width (cont’d) 8 Module Interface Levels 9 SDRAM Cycle Time ...

Page 11

... SPD-Table for 64M x 64 (512 MByte non-ECC) Modules HYS64V64220GU Byte Description # 34 SDRAM Data Input Hold Time 35 SDRAM Data Input Setup Time 36-61 Superset Information 62 SPD Revision 63 Checksum for Bytes Manufacturers JEDEC ID Code 65-71 Manufacturer 72 Module Assembly Locaction 73-90 Module Part Number 91-92 Module Revision Code ...

Page 12

... SPD-Table for 64M x 72 (512 MByte ECC) Modules HYS72V64220GU Byte# Description 0 Number of SPD Bytes 1 Total Bytes in Serial PD 2 Memory Type 3 Number of Row Addresses 4 Number of Column Addresses 5 Number of DIMM Banks 6 Module Data Width 7 Module Data Width (cont’d) 8 Module Interface Levels 9 SDRAM Cycle Time ...

Page 13

... SPD-Table for 64M x 72 (512 MByte ECC) Modules HYS72V64220GU Byte# Description 34 SDRAM Data Input Hold Time 35 SDRAM Data Input Setup Time 36-61 Superset Information 62 SPD Revision 63 Checksum for Bytes Manufacturers JEDEC ID Code 65-71 Manufacturer 72 Module Assembly Locaction 73-90 Module Part Number 91-92 Module Revision Code ...

Page 14

... L-DIM-168-30 (JEDEC MO-161-BA) SDRAM DIMM Module Package HYS 64/72V64220GU 1. min. Detail of Contacts 1.27 INFINEON Technologies + 0.15 133.35 - 127. 6.35 6.35 42. 1.27 = 115. 124 125 *) 1 Note: All tolerances according to JEDEC standard 14 HYS 64/72V64220GU SDRAM-Modules 4 max 0.1 - 1.27 168 ECC modules only L-DIM-168-30 9.01 ...

Page 15

... Some timing parameters adjusted according to INTELs PC133 specification 20.1.2000 10.3.2000 Implemented differences between 256Mbit S20 and S17 PC133 modules 256Mbit S20 based PC133 modules are backward compatible to PC100 3-2-2 256Mbit S17 based modules are backwards compatible to PC100-2-2-2 10.5.2000 5.03.2001 24.07.2001 06.09.2001 INFINEON Technologies ...

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