HYS64V64220GU INFINEON [Infineon Technologies AG], HYS64V64220GU Datasheet - Page 12

• Manufacturer Part Number: HYS64V64220GU
• Description: 3.3 V 64M x 64/72-Bit, 512MByte SDRAM Modules 168-pin Unbuffered DIMM Modules
• Manufacturer: INFINEON [Infineon Technologies AG]

INFINEON Technologies
SPD-Table for 64M x 72 (512 MByte ECC) Modules HYS72V64220GU
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
Byte# Description
Number of SPD Bytes
Total Bytes in Serial PD
Memory Type
Number of Row Addresses
Number of Column Addresses
Number of DIMM Banks
Module Data Width
Module Data Width (cont’d)
Module Interface Levels
SDRAM Cycle Time at CL = 3
Access Time from Clock at CL = 3
DIMM Config
Refresh Rate/Type
SDRAM Width, Primary
Error Checking SDRAM Data Width
Minimum Clock Delay for Back-to-
Back Random Column Address
Burst Length Supported
Number of SDRAM Banks
Supported CAS Latencies
CS Latencies
WE Latencies
SDRAM DIMM Module Attributes
SDRAM Device Attributes: General
SDRAM Cycle Time at CL = 2
Access Time from Clock for CL = 2
Minimum Clock Cycle Time at CL = 1
Maximum Data Access Time from
Clock at CL = 1
Minimum Row Precharge Time
Minimum Row Active to Row Active
Delay
Minimum RAS to CAS Delay
Minimum RAS Pulse Width
Module Bank Density (per bank)
SDRAM Input Setup Time
SDRAM Input Hold Time
t
RRD
t
RAS
t
RCD
12
SPD Entry Value
Write latency = 0
V
42 / 45 / 50 ns
CS latency = 0
14 / 15 / 16 ns
not supported
not supported
Self-Refresh,
t
DD
7.5 / 10.0 ns
CCD
5.4 / 6.0 ns
1.5 / 2.0 ns
0.8 / 1.0 ns
CL = 2 & 3
unbuffered
256 MByte
7.5 / 10 ns
1, 2, 4 & 8
15 / 20 ns
15 / 20 ns
5.4 / 6 ns
SDRAM
LVTTL
tol +/– 10%
7.8 s
ECC
128
256
= 1 CLK
13
10
72
x8
x8
2
0
4
HYS 64/72V64220GU
0E
2A
75
54
75
54
00
00
0F
0F
15
08
-7
SDRAM-Modules
64M x 72
Hex
-7.5
0D
0A
0E
A0
FF
FF
2D
0F
0F
80
08
04
02
48
00
01
75
54
02
82
08
08
01
04
06
01
01
00
60
14
14
40
15
08
A0
A0
FF
FF
60
60
14
10
14
32
20
10
-8
9.01