SCD1284 INTEL [Intel Corporation], SCD1284 Datasheet - Page 149
SCD1284
Manufacturer Part Number
SCD1284
Description
IEEE 1284-Compatible Parallel Interface Controller with Two High-Speed Asynchronous Serial Ports
Manufacturer
INTEL [Intel Corporation]
Datasheet
1.SCD1284.pdf
(176 pages)
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7.8.7
Datasheet
Register Name: ODR
Register Description: Ones Detect
Access: Read/Write
Bit 7
0
Bit
3:0
7
6
5
4
Any change in the mode of the parallel port is reported to the peripheral host by interrupt if the
NegCh bit (PCIER[5]) is set; host software then reads the NSR to determine the current status and
condition. Once the host has read the NSR status resulting from the current negotiation, it should
clear the register in preparation for additional negotiation cycles. The NSR can be cleared by
writing any value.
Ones Detect Register
Negotiation OK: The state of this bit indicates that the negotiation was successful.
Negotiation Failed: The state of this bit indicates that the negotiation failed. The result code indicates which
mode was attempted
Host Timeout: This bit indicates that a host timeout occurred on the parallel channel. The accompanying 4-
bit result code indicates that the link has returned to Compatibility mode (x02). See the description of HTVR in
Section 7.8.2 on page
Immediate Termination: This bit indicates that the A1284 signal has unexpectedly gone inactive as a result
of an immediate termination from the host and the interface and has reentered Compatibility mode. The 4-bit
negotiation result code should indicate which mode was terminated.
The lower 4 bits of this register contain a result code that shows the current mode. The following table shows
the encoding of the result code.
Bit 6
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
Bit 5
0
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
146.
IEEE 1284-Compatible Parallel Interface Controller — CD1284
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Bit 4
Compatible mode — no negotiation.
Failed negotiation.
Compatible mode — termination of a 1284 mode.
Reserved.
EPP mode.
Reserved.
Reverse Nibble mode.
Reverse Nibble mode — ID request.
Reverse Byte mode.
Reverse Byte mode — ID request.
ECP mode without RLE.
ECP mode without RLE — ID request.
ECP mode with RLE.
ECP mode with RLE — ID request.
0
Description
A1284
Bit 3
Bit 2
nInit
HstBsy
Bit 1
8-Bit Hex Address: 2D
Default Value: 00
HstClk
Bit 0
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