ELANSC310 AMD [Advanced Micro Devices], ELANSC310 Datasheet - Page 48

• Manufacturer Part Number: ELANSC310
• Description: Single-Chip, 32-Bit, PC/AT Microcontroller
• Manufacturer: AMD [Advanced Micro Devices]

The ÉlanSC300 microcontroller samples the two reset
inputs (RESIN and IORESET) to logically determine
what state the power pins are in; and, in turn, controls
the internal pull-down resistors. Note that in Micro
Micro Power Off DRAM Refresh
Refresh can be either enabled or disabled during Micro
Power Off mode, and the VMEM power can be option-
ally removed, provided that either the memory is also
powered off or all DRAM interface signals are kept at
0 V. See the timing diagrams in Figure 34 and Figure
35 on page 88 for more information.
The system designer has the option to keep the system
DRAM powered up and refreshed while the ÉlanSC310
microcontroller is in the micro power state. A configura-
tion bit, the Micro Power Refresh Enabled bit, exists in
the PMU section of the core logic to realize this feature.
This is bit 2 of the Miscellaneous 3 Register at Index
BAh. If this bit is cleared (default), the core logic asso-
ciated with the DRAM refresh will be disabled when the
ÉlanSC310 microcontroller is in the Micro Power state.
If the bit is set, the core logic associated with the DRAM
48
Output Enable
To Core Logic
VCC Core
Data Out
Core Logic
Force Term
Figure 4. ÉlanSC310 Microcontroller I/O Structure
Where: VCCIO = VCC5, VMEM, VSYS, VSYS2, AVCC, or VCC1
Élan™SC310 Microcontroller Data Sheet
BUF
IN
Translator and
Translator and
VCC CLAMP = VCC5, VMEM, or AVCC
Pre-Driver
Pre-Driver
Level
Level
P R E L I M I N A R Y
I/O Driver
Power Off mode, the IORESET input should be termi-
nated with a pull-down resistor if not driven Low by an
external device (see Table 23 on page 50 for more in-
formation about internal I/O pull-down states).
refresh will be enabled and functional while the
ÉlanSC310 microcontroller is in its Micro Power state.
The type of Micro Power DRAM refresh performed
(CAS-before-RAS refresh, or self refresh) will be the
same as that for which the part was configured before
the IORESET pin sampled Low. If the micro power re-
fresh feature is enabled for CAS-before-RAS refresh,
the system designer should maintain power on the
VMEM power pin of the ÉlanSC310 microcontroller
and not remove power from the DRAM devices. If the
micro power refresh feature is enabled for self refresh,
the system designer may or may not be required to
maintain power on the VMEM power pin of the
ÉlanSC310 microcontroller, depending on the specific
requirement of the DRAM device in Self-Refresh mode.
Power should not be removed from the DRAM device
itself in either case.
Pull-Up
Resistor
Pull-Down
Resistor
VCCIO
VCC CLAMP
Pins
PAD
I/O