ELANSC310 AMD [Advanced Micro Devices], ELANSC310 Datasheet - Page 94

• Manufacturer Part Number: ELANSC310
• Description: Single-Chip, 32-Bit, PC/AT Microcontroller
• Manufacturer: AMD [Advanced Micro Devices]

Notes:
For more information about DRAM first cycle read wait states, see the DRAM First Cycle Wait State Select Logic table in
Chapter 4 of the Élan
94
Symbol
Symbol
t28a
t41a
t44a
t28b
t29a
t33
t34
t39
t40
t41b
t5a
t30
t31
t32
t33
t34
t38
t39
t40
t5b
t36
MA valid setup to RAS Low
MA hold from RAS Low
MA setup to CAS Low
RAS hold from CAS Low
RAS precharge from CAS High
MA hold from CAS active
RAS to CAS delay
RAS pulse width
RAS hold from CAS Low
RAS precharge from CAS High
RAS to CAS delay
RAS pulse width
CAS Low to data valid (read access time)
RAS Low to data valid (read access time)
CAS pulse width (read, first cycle)
CAS hold from RAS Low
CAS Low to data valid (read access time)
RAS Low to data valid (read access time)
CAS precharge (page miss read)
RAS precharge (page miss)
CAS pulse width (read, page miss)
TM
SC310 Microcontroller Programmer’s Reference Manual , order #20665.
Table 48. DRAM Bank/Page Miss Read Cycles (See Figure 38)
Parameter Description
Parameter Description
Table 47. DRAM First Cycle Read Access (See Figure 38)
Élan™SC310 Microcontroller Data Sheet
P R E L I M I N A R Y
Wait States
Wait State
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
N/A
1
2
3
1
2
3
1
2
3
1
2
3
3
4
5
3
4
5
3
4
5
3
4
5
Min
Min
110
120
110
20
50
80
50
80
10
20
10
15
20
70
30
60
90
60
90
35
65
80
65
95
30
20
10
38
38
53
20
70
45
75
90
0
0
10,000
10,000
Max
Max
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns