HY5DU281622DLT HYNIX [Hynix Semiconductor], HY5DU281622DLT Datasheet - Page 19

• Manufacturer Part Number: HY5DU281622DLT
• Description: 128Mb-S DDR SDRAM
• Manufacturer: HYNIX [Hynix Semiconductor]

MODE REGISTER SET (MRS)
The mode register is used to store the various operating modes such as /CAS latency, addressing mode, burst length,
burst type, test mode, DLL reset. The mode register is programed via MRS command. This command is issued by the
low signals of /RAS, /CAS, /CS, /WE and BA0. This command can be issued only when all banks are in idle state and
CKE must be high at least one cycle before the Mode Register Set Command can be issued. Two cycles are required to
write the data in mode register. During the MRS cycle, any command cannot be issued. Once mode register field is
determined, the information will be held until resetted by another MRS command.
Rev. 0.0 / Apr. 2003
BA0
BA1
0
1
0
BA0
0
MRS Type
EMRS
MRS
A12
A11
RFU
A8
0
1
A10
DLL Reset
Yes
No
A9
A6
0
0
0
0
1
1
1
1
A5
DR
A8
0
0
1
1
0
0
1
1
A7
0
1
A4
0
1
0
1
0
1
0
1
TM
A7
Test Mode
Normal
CAS Latency
Test
Reserved
Reserved
Reserved
Reserved
Reserved
A6
CAS Latency
2.5
2
3
A5
A4
A3
0
1
A3
BT
A2
0
0
0
0
1
1
1
1
A1
A2
0
0
1
1
0
0
1
1
Burst Length
Burst Type
Sequential
Interleave
A0
0
1
0
1
0
1
0
1
A1
HY5DU28422D(L)T
HY5DU28822D(L)T
HY5DU281622D(L)T
Sequential
Reserved
Reserved
Reserved
Reserved
Reserved
A0
2
4
8
Burst Length
Interleave
Reserved
Reserved
Reserved
Reserved
Reserved
2
4
8
19