XRT91L82ES Exar, XRT91L82ES Datasheet - Page 41

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XRT91L82ES

Manufacturer Part Number
XRT91L82ES
Description
Bus Transceivers Transceiver
Manufacturer
Exar
Datasheet

Specifications of XRT91L82ES

Product Category
Bus Transceivers
Rohs
yes
xr
xr
xr
xr
REV. P1.0.5
B
D7
D6
D5
D4
D3
D2
D1
D0
IT
PRBSEIE
Reserved
PRBSLIE
VCXOIE
FIFOIE
CDRIE
CMUIE
LOSIE
N
AME
T
ABLE
This Register Bit is Not Used
2
"0" = Masks the PRBS Pattern Lock interrupt generation
"1" = Enables Interrupt generation
N
2
"0" = Masks the PRBS error interrupt generation
"1" = Enables Interrupt generation
N
Voltage Controlled External Oscillator Lock Interrupt Enable
"0" = Masks the VCXO Lock interrupt generation
"1" = Enables Interrupt generation
N
Loss of Signal Interrupt Enable
"0" = Masks the LOS interrupt generation
"1" = Enables Interrupt generation
Clock and Data Recovery Lock Interrupt Enable
"0" = Masks the CDR Lock interrupt generation
"1" = Enables Interrupt generation
Clock Multiplier Unit Lock Interrupt Enable
"0" = Masks the CMU Lock interrupt generation
"1" = Enables Interrupt generation
FIFO Overflow Interrupt Enable
"0" = Masks the FIFO Overflow interrupt generation
"1" = Enables Interrupt generation
23
23
OTE
OTE
OTE
-1 PRBS Pattern Lock Interrupt Enable
-1 PRBS Pattern Error Interrupt Enable
: PRBS_EN must be enabled for this bit to have functional
: PRBS_EN must be enabled for this bit to have functional
: VCXOLKEN must be enabled for this bit to have functional
14: M
meaning.
meaning.
meaning.
I
NTERRUPT
ICROPROCESSOR
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
E
PRELIMINARY
NABLE
F
C
UNCTION
ONTROL
R
38
EGISTER
R
EGISTER
0
X
00
H
(0
B
X
IT
00
D
H
ESCRIPTION
)
Register
Type
R/W
R/W
R/W
R/W
R/W
R/W
R/W
X
XRT91L82
(HW reset)
Default
Value
X
0
0
0
0
0
0
0

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