XRT91L82ES Exar, XRT91L82ES Datasheet - Page 7

• Manufacturer Part Number: XRT91L82ES
• Description: Bus Transceivers Transceiver
• Manufacturer: Exar

Specifications of XRT91L82ES

• Product Category: Bus Transceivers
• Rohs: yes

xr
xr
REV. P1.0.5
PIN DESCRIPTIONS
COMMON CONTROL
xr
xr
REF1CLKP
REF1CLKN
PIO_CFG1
PIO_CFG0
SEREFDIS
XRES1P
XRES1N
SE_REF
RESET
N
AME
LVPECL Diff
LVCMOS
LVCMOS
LVCMOS
LVTTL,
LVTTL,
LVTTL,
Analog
L
EVEL
-
T
YPE
O
I
I
I
I
I
2.488/2.666 GBPS STS-48/STM-16 SONET/SDH TRANSCEIVER
PRELIMINARY
E14
A13
B13
F14
P
E5
D3
E3
C3
L7
IN
Master Reset Input
Active low signal. When this pin is pulled "Low" for more than
30ns, the internal registers are set to their default state. See
the register description for the default values.
This pin is provided with an internal pull-up.
Parallel I/O Configuration
Selects parallel I/O to be differential LVDS, differential
LVPECL, or Single-Ended LVPECL based on table below.
This pin is provided with an internal pull-down.
External LVDS Biasing Resistors
A 402 resistor with +/-1% tolerance should be placed across
these 2 pins for proper biasing. Although unecessary in
LVPECL operation, this resistor is required in LVDS operation.
See Figure 8 on page 22.
Single-Ended LVPECL Biasing Output Reference
VBB 100K output bias reference.
Maximum load capacitance is 30pF. Maximum sourcing/sinking
capability is 750 A and 1000 A respectively.
SE_REF Power down Control
Powers down SE_REF and reduces power consumption.
"Low" = SE_REF Enabled
"High" = SE_REF Disabled
This pin is provided with an internal pull-up.
Reference Clock Input 1
This differential clock input reference is used for the transmit
clock multiplier unit (CMU) and clock data recovery (CDR) to
provide the necessary high-speed clock reference for this
device. Pin REFREQSEL[1:0] determines the value used as
the reference. See Pin REFREQSEL[1:0] for more details.
Internally terminated and biased.
4
PIO_CFG
[1:0]
00
01
10
11
VDD_I/O
3.3V
3.3V
3.3V
D
ESCRIPTION
Differential LVDS
Configuration
Single-Ended
Differential
LVPECL
LVPECL
Input
3.3V
3.3V
3.3V
Reserved
Differential LVDS
Configuration
Single-Ended
Differential
LVPECL
LVPECL
Output
XRT91L82
3.3V
3.3V
3.3V