PCAL6408AHKX NXP Semiconductors, PCAL6408AHKX Datasheet - Page 20

• Manufacturer Part Number: PCAL6408AHKX
• Description: Interface - I/O Expanders 8bit I2C/SMBus IO Expander w/Interrupt
• Manufacturer: NXP Semiconductors

Specifications of PCAL6408AHKX

• Maximum Operating Frequency: 100 kHz
• Operating Supply Voltage: 1.65 V to 5.5 V
• Operating Temperature Range: - 40 C to + 85 C
• Mounting Style: SMD/SMT
• Package / Case: XQFN-16
• Operating Current: 200 mA
• Output Current: 25 mA
• Product Type: I/O Expanders

NXP Semiconductors
PCAL6408A
Product data sheet
9.3 Power-on reset requirements
Reducing the current drive capability may be desirable to reduce system noise. When the
output switches (transitions from H/L), there is a peak current that is a function of the
output drive selection. This peak current runs through V
and will create noise (some radiated, but more critically Simultaneous Switching Noise
(SSN)). In other words, switching many outputs at the same time will create ground and
supply noise. The output drive strength control through the Output Drive Strength
registers allows the user to mitigate SSN issues without the need of additional external
components.
In the event of a glitch or data corruption, PCAL6408A can be reset to its default
conditions by using the power-on reset feature. Power-on reset requires that the device
go through a power cycle to be completely reset. This reset also happens when the device
is powered on for the first time in an application.
The two types of power-on reset are shown in
Table 19
types of power-on reset.
Fig 17. V
Fig 18. V
V
DD(P)
V
ramp-up
(dV/dt)
DD(P)
specifies the performance of the power-on reset feature for PCAL6408A for both
DD
DD
r
is lowered below 0.2 V or 0 V and then ramped up to V
is lowered below the POR threshold, then ramped back up to V
V
All information provided in this document is subject to legal disclaimers.
I
drops below POR levels
Rev. 2 — 6 December 2012
Low-voltage translating, 8-bit I
ramp-down
(dV/dt)
ramp-down
f
(dV/dt)
to V
f
when V
time to re-ramp
POR(min)
Figure 17
below 0.2 V or to V
DD(P)
when V
t
d(rst)
time to re-ramp
− 50 mV
drops
t
d(rst)
DD(P)
DD
and
drops
and V
2
SS
C-bus/SMBus I/O expander
Figure
ramp-up
PCAL6408A
(dV/dt)
SS
re-ramp-up
DD
(dV/dt)
package inductance
18.
r
r
© NXP B.V. 2012. All rights reserved.
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