PCAL6408AHKX NXP Semiconductors, PCAL6408AHKX Datasheet - Page 8

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PCAL6408AHKX

Manufacturer Part Number
PCAL6408AHKX
Description
Interface - I/O Expanders 8bit I2C/SMBus IO Expander w/Interrupt
Manufacturer
NXP Semiconductors
Datasheet

Specifications of PCAL6408AHKX

Maximum Operating Frequency
100 kHz
Operating Supply Voltage
1.65 V to 5.5 V
Operating Temperature Range
- 40 C to + 85 C
Mounting Style
SMD/SMT
Package / Case
XQFN-16
Operating Current
200 mA
Output Current
25 mA
Product Type
I/O Expanders
NXP Semiconductors
Table 6.
[1]
PCAL6408A
Product data sheet
B7
0
0
0
0
0
0
0
0
0
0
0
0
Undefined.
B6
0
0
0
0
1
1
1
1
1
1
1
1
Pointer register bits
Command byte
B5
0
0
0
0
0
0
0
0
0
0
0
0
B4
7.2 Interface definition
7.3 Pointer register and command byte
0
0
0
0
0
0
0
0
0
0
0
0
B3
0
0
0
0
0
0
0
0
0
0
0
0
Table 5.
Following the successful acknowledgement of the address byte, the bus master sends a
command byte, which is stored in the Pointer register in the PCAL6408A. Two bits of this
data byte state the operation (read or write) and the internal registers (Input, Output,
Polarity Inversion, or Configuration) that will be affected. Bit 6 in conjunction with the lower
three bits of the Command byte are used to point to the extended features of the device
(Agile I/O). This register is write only.
Byte
I
I/O data bus
2
Fig 6.
C-bus slave address
B2
0
0
0
0
0
0
0
0
1
1
1
1
B1
0
0
1
1
0
0
1
1
0
0
1
1
Pointer register bits
Interface definition
B0
0
1
0
1
0
1
0
1
0
1
0
1
All information provided in this document is subject to legal disclaimers.
Command byte Register
Rev. 2 — 6 December 2012
00h
01h
02h
03h
40h
41h
42h
43h
44h
45h
46h
47h
7 (MSB)
P7
Low-voltage translating, 8-bit I
L
B7
B6
Input port
Output port
Polarity Inversion
Configuration
Output drive strength 0
Output drive strength 1
Input latch
Pull-up/pull-down enable
Pull-up/pull-down selection read/write byte
Interrupt mask
Interrupt status
Output port configuration
P6
H
6
B5
B4
P5
5
L
B3
B2
P4
4
L
B1
002aaf540
Bit
B0
P3
3
L
2
C-bus/SMBus I/O expander
Protocol
read byte
read/write byte
read/write byte
read/write byte
read/write byte
read/write byte
read/write byte
read/write byte
read/write byte
read byte
read/write byte
PCAL6408A
P2
2
L
© NXP B.V. 2012. All rights reserved.
ADDR
P1
1
1111 1111
0000 0000
1111 1111
1111 1111
1111 1111
0000 0000
1111 1111
1111 1111
0000 0000
0000 0000
Power-up
default
xxxx xxxx
0000 0000
0 (LSB)
R/W
P0
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[1]

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