74ABT16501CMTD Fairchild Semiconductor, 74ABT16501CMTD Datasheet
74ABT16501CMTD
Specifications of 74ABT16501CMTD
Related parts for 74ABT16501CMTD
74ABT16501CMTD Summary of contents
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... MS56A 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide 74ABT16501CMTD MTD56 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide Devices also available in Tape or Reel. Specify by appending the suffix letter “X” to the ordering code. ...
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Logic Diagram www.fairchildsemi.com 2 ...
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Absolute Maximum Ratings Storage Temperature Ambient Temperature under Bias Junction Temperature under Bias V Pin Potential to CC Ground Pin Input Voltage (Note 5) Input Current (Note 5.0 mA Voltage Applied to Any Output in the ...
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DC Electrical Characteristics Symbol Parameter V Quiet Output Maximum Dynamic V OLP OL V Quiet Output Minimum Dynamic V OLV OL V Minimum HIGH Level Dynamic Output Voltage OHV V Minimum HIGH Level Dynamic Input Voltage IHD V Maximum LOW ...
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Capacitance Symbol Parameter C Input Capacitance IN C (Note 10) Output Capacitance I/O Note 10 measured at frequency f 1 MHz per MIL-STD-883, Method 3012. I/O AC Loading *Includes jig and probe capacitance. FIGURE 1. Standard AC Test ...
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Physical Dimensions inches (millimeters) unless otherwise noted 56-Lead Shrink Small Outline Package (SSOP), JEDEC MO-118, 0.300” Wide www.fairchildsemi.com Package Number MS56A 6 ...
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Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 56-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 6.1mm Wide LIFE SUPPORT POLICY FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE ...