MM74HC4050M_Q Fairchild Semiconductor, MM74HC4050M_Q Datasheet

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MM74HC4050M_Q

Manufacturer Part Number
MM74HC4050M_Q
Description
Buffers & Line Drivers Hex Converter
Manufacturer
Fairchild Semiconductor
Datasheet

Specifications of MM74HC4050M_Q

Number Of Input Lines
6
Number Of Output Lines
6
Polarity
Non-Inverting
Supply Voltage - Max
6 V
Supply Voltage - Min
2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOIC-16
High Level Output Current
- 5.2 mA
Logic Family
74HC
Logic Type
Voltage Level Translation
Low Level Output Current
5.2 mA
Minimum Operating Temperature
- 40 C
Number Of Channels Per Chip
6
Propagation Delay Time
85 ns, 17 ns, 15 ns
© 1999 Fairchild Semiconductor Corporation
Order Number
MM74HC4049M
MM74HC4049SJ
MM74HC4049MTC
MM74HC4049N
MM74HC4050M
MM74HC4050SJ
MM74HC4050MTC
MM74HC4050N
MM74HC4049 • MM74HC4050
Hex Inverting Logic Level Down Converter •
Hex Logic Level Down Converter
General Description
The
advanced silicon-gate CMOS technology, and have a mod-
ified input protection structure that enables these parts to
be used as logic level translators which will convert high
level logic to a low level logic while operating from the low
logic supply. For example, 0–15V CMOS logic can be con-
verted to 0–5V logic when using a 5V supply. The modified
input protection has no diode connected to V
ing the input voltage to exceed the supply. The lower zener
diode protects the input from both positive and negative
static voltages. In addition each part can be used as a sim-
Ordering Code:
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
MM74HC4049
Package Number Package Description
MM74HC4049
and
MTC16
MTC16
M16A
M16D
M16A
M16D
N16E
N16E
the
MM74HC4050
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153. 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153. 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide
CC
, thus allow-
DS005214
utilize
ple buffer or inverter without level translation. The
MM74HC4049 is pin and functionally compatible to the
CD4049BC and the MM74HC4050 is compatible to the
CD4050BC
Features
Typical propagation delay: 8 ns
Wide power supply range: 2V–6V
Low quiescent supply current: 20 A maximum (74HC)
Fanout of 10 LS-TTL loads
MM74HC4050
February 1984
Revised October 1999
www.fairchildsemi.com

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MM74HC4050M_Q Summary of contents

Page 1

... Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagrams MM74HC4049 © 1999 Fairchild Semiconductor Corporation ple buffer or inverter without level translation. The MM74HC4049 is pin and functionally compatible to the utilize ...

Page 2

Absolute Maximum Ratings (Note 2) Supply Voltage ( Input Voltage ( Output Voltage (V ) OUT Clamp Diode Current ( Output Current, per pin (I ) OUT DC ...

Page 3

AC Electrical Characteristics Symbol Parameter Maximum Propagation Delay PHL PLH AC Electrical Characteristics V 2.0V to 6.0V pF, ...

Page 4

Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150” Narrow 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide www.fairchildsemi.com Package Number M16A Package Number M16D 4 ...

Page 5

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide Package Number MTC16 5 www.fairchildsemi.com ...

Page 6

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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