ATMEGA16U2-16AU Atmel, ATMEGA16U2-16AU Datasheet - Page 177

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ATMEGA16U2-16AU

Manufacturer Part Number
ATMEGA16U2-16AU
Description
8-bit Microcontrollers - MCU 16K Flash
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA16U2-16AU

Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
AVR
Data Bus Width
8 bit
Program Memory Size
16 KB
Data Ram Size
1.25 KB
Data Rom Size
512 B
Program Memory Type
Flash
Factory Pack Quantity
1250
Table 19-1.
19.4
Table 19-2.
7799D–AVR–11/10
Operating Mode
Synchronous Master mode
UCPOLn
SPI Data Modes and Timing
0
0
1
1
Equations for Calculating Baud Rate Register Setting
UCPOLn and UCPHAn Functionality-
UCPHAn
Note:
There are four combinations of XCKn (SCK) phase and polarity with respect to serial data, which
are determined by control bits UCPHAn and UCPOLn. The data transfer timing diagrams are
shown in
signal, ensuring sufficient time for data signals to stabilize. The UCPOLn and UCPHAn function-
ality is summarized in
all ongoing communication for both the Receiver and Transmitter.
Figure 19-1. UCPHAn and UCPOLn data transfer timing diagrams.
0
1
0
1
BAUD
f
UBRRn
OSC
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
XCK
XCK
Data sample (RXD)
1. The baud rate is defined to be the transfer rate in bit per second (bps)
Equation for Calculating Baud Rate
Figure
BAUD
19-1. Data bits are shifted out and latched in on opposite edges of the XCKn
SPI Mode
=
Table
Baud rate (in bits per second, bps)
System Oscillator clock frequency
Contents of the UBRRnH and UBRRnL Registers, (0-4095)
0
1
2
3
UCPOL=0
-------------------------------------- -
2 UBRRn
19-2. Note that changing the setting of any of these bits will corrupt
f
OSC
Leading Edge
Sample (Rising)
Setup (Rising)
Sample (Falling)
Setup (Falling)
+
1
(1)
ATmega8U2/16U2/32U2
Data setup (TXD)
Data sample (RXD)
Data setup (TXD)
Data sample (RXD)
XCK
XCK
Equation for Calculating UBRRn Value
UBRRn
Trailing Edge
Setup (Falling)
Sample (Falling)
Setup (Rising)
Sample (Rising)
UCPOL=1
=
-------------------- 1
2BAUD
f
OSC
177

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