ATMEGA16U2-16AU Atmel, ATMEGA16U2-16AU Datasheet - Page 35

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ATMEGA16U2-16AU

Manufacturer Part Number
ATMEGA16U2-16AU
Description
8-bit Microcontrollers - MCU 16K Flash
Manufacturer
Atmel
Datasheet

Specifications of ATMEGA16U2-16AU

Product Category
8-bit Microcontrollers - MCU
Rohs
yes
Core
AVR
Data Bus Width
8 bit
Program Memory Size
16 KB
Data Ram Size
1.25 KB
Data Rom Size
512 B
Program Memory Type
Flash
Factory Pack Quantity
1250
8.7
8.8
8.9
7799D–AVR–11/10
External Clock
Clock Output Buffer
System Clock Prescaler
The device can utilize a external clock source as shown in
external clock, the CKSEL Fuses must be programmed as shown in
Figure 8-5.
When this clock source is selected, start-up times are determined by the SUT Fuses as shown in
Table
Table 8-8.
When applying an external clock, it is required to avoid sudden changes in the applied clock fre-
quency to ensure stable operation of the MCU. A variation in frequency of more than 2% from
one clock cycle to the next can lead to unpredictable behavior. If changes of more than 2% is
required, ensure that the MCU is kept in Reset during the changes.
Note that the System Clock Prescaler can be used to implement run-time changes of the internal
clock frequency while still ensuring stable operation. Refer to
35
The device can output the system clock on the CLKO pin. To enable the output, the CKOUT
Fuse has to be programmed. This mode is suitable when the chip clock is used to drive other cir-
cuits on the system. The clock also will be output during reset, and the normal operation of I/O
pin will be overridden when the fuse is programmed. Any clock source, including the internal RC
Oscillator, can be selected when the clock is output on CLKO. If the System Clock Prescaler is
used, it is the divided system clock that is output.
The ATmega8U2/16U2/32U2 has a system clock prescaler, and the system clock can be divided
by setting the
BOD enabled
Fast rising power
Slowly rising power
for details.
Power Conditions
8-8.
External Clock Drive Configuration
Start-up Times for the External Clock Selection
“CLKPR – Clock Prescale Register” on page
EXTERNAL
SIGNAL
CLOCK
Start-up Time from Power-
down and Power-save
NC
Reserved
6 CK
6 CK
6 CK
ATmega8U2/16U2/32U2
XTAL2
XTAL1
GND
Figure
Additional Delay from
“System Clock Prescaler” on page
Reset (V
39. This feature can be used to
14CK + 4.1 ms
14CK + 65 ms
8-5. To run the device on an
Table
14CK
CC
= 5.0V)
8-1.
SUT1..0
00
01
10
11
35

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