ATMEGA16U2-16AU Atmel, ATMEGA16U2-16AU Datasheet - Page 215

• Manufacturer Part Number: ATMEGA16U2-16AU
• Description: 8-bit Microcontrollers - MCU 16K Flash
• Manufacturer: Atmel

Specifications of ATMEGA16U2-16AU

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: AVR
• Data Bus Width: 8 bit
• Program Memory Size: 16 KB
• Data Ram Size: 1.25 KB
• Data Rom Size: 512 B
• Program Memory Type: Flash
• Factory Pack Quantity: 1250

21.18.11 UECFG0X – USB Endpoint Configuration 0 Register
7799D–AVR–11/10
• Bit 4 – STALLRQC: STALL Request Clear Handshake Bit
Writing this bit to one disables the pending STALL handshake mechanism triggered by
STALLRQ bit. This bit can not be write to zero, it is cleared by hardware immediately after the
write to one operation.
See
• Bit 3 – RSTDT: Reset Data Toggle Bit
Writing this bit to one allows to reset the data toggle bit field for the selected endpoint. This bit
can not be write to zero, it is cleared by hardware immediately after the write to one operation.
• Bits 2:1 – Res: Reserved
These bits are reserved and will always read as zero.
• Bit 0 – EPEN: Endpoint Enable Bit
Writing this bit to one enables the selected endpoint. When the endpoint is enabled it can be
configured and used by the USB controller. Endpoint 0 shall always be enabled after a hardware
or USB reset and participate in the device configuration. Writing this bit to zero disables the cur-
rent endpoint.
See
• Bit 7:6 – EPTYPE[1:0]: Endpoint Type Bits
These bits configure the endpoint type for the selected endpoint as shown in
Table 21-2.
• Bits 5:1 – Res: Reserved
These bits are reserved and will always read as zero.
• Bit 0 – EPDIR: Endpoint Direction Bit
Writing this bit to one configures the selected endpoint in the IN direction. Writing this bit to zero
configure the endpoint in the OUT direction. This bit is relevant for bulk, interrupt or isochronous
endpoints. Using this bit with a control endpoint has no effect (control endpoints are
bidirectional).
Bit
(0xEC)
Read/Write
Initial Value
“STALL request” on page 201
“Endpoint activation” on page 198
EPTYPE1
0
0
1
1
R/W
7
0
EPTYPE1:0
EPTYPE[1:0] Bits Settings
R/W
6
0
R
5
0
-
EPTYPE0
for more details.
0
1
0
1
for more details.
R
4
0
-
Endpoint Type Configuration
Control Type
Isochronous Type
Bulk Type
Interrupt Type
ATmega8U2/16U2/32U2
R
3
0
-
R
2
0
-
R
1
0
-
Table
EPDIR
R/W
0
0
21-2.
UECFG0X
215