C8051F521-IMR Silicon Labs, C8051F521-IMR Datasheet - Page 40

• Manufacturer Part Number: C8051F521-IMR
• Description: 8-bit Microcontrollers - MCU 8KB 12ADC 125C 10Pin MCU
• Manufacturer: Silicon Labs

Specifications of C8051F521-IMR

• Product Category: 8-bit Microcontrollers - MCU
• Rohs: yes
• Core: 8051
• Data Bus Width: 8 bit
• Maximum Clock Frequency: 25 MHz
• Program Memory Size: 8 KB
• Data Ram Size: 256 B
• On-chip Adc: Yes
• Package / Case: DFN-10
• Mounting Style: SMD/SMT
• A/d Bit Size: 12 bit
• A/d Channels Available: 6
• Interface Type: SPI, UART
• Maximum Operating Temperature: + 125 C
• Minimum Operating Temperature: - 40 C
• Number Of Programmable I/os: 6
• Number Of Timers: 3
• On-chip Dac: No
• Processor Series: C8051
• Program Memory Type: Flash
• Factory Pack Quantity: 1500
• Supply Voltage - Max: 2.7 V, 5.25 V
• Supply Voltage - Min: 2 V, 2.7 V

C8051F52x/F53x
Table 3.4. Pin Definitions for the C8051F53x and C805153xA (TSSOP 20)
40
*Note: Please refer to Section “20. Device Specific Behavior” on page 210.
RST/C2CK
P0.0/V
Name
C2CK
RST/
P0.0/
V
GND
P0.2
P0.1
V
V
REF
DD
GND
P1.7
P1.6
P1.5
P0.2
P0.1
REGIN
V
REF
DD
‘F53x-C
1
2
3
4
5
6
7
8
9
10
‘F53xA
Pin Numbers
1
2
3
4
5
6
‘F53x
Figure 3.4. TSSOP-20 Pinout Diagram (Top View)
1
2
3
4
5
6
20
19
18
17
16
15
14
13
12
11
D I/O or
D I/O or
D I/O or
A O or
D I/O
D I/O
Type
D In
A In
A In
A In
P0.6/C2D
P1.1
P0.3
P0.4/TX
P0.5/RX
P1.3
P0.7/XTAL1
P1.0/XTAL2
P1.2/CNVSTR
P1.4
Description
Port 0.2. See Port I/O Section for a complete description.
Port 0.1. See Port I/O Section for a complete description.
Device Reset. Open-drain output of internal POR or V
An external source can initiate a system reset by driving this pin
low for at least the minimum RST low time to generate a system
reset, as defined in Table 2.8 on page 32. A 1 k pullup to V
GIN
description.
Clock signal for the C2 Debug Interface.
Port 0.0. See Port I/O Section for a complete description.
External V
Ground.
Core Supply Voltage.
is recommended. See Reset Sources Section for a complete
Rev. 1.4
REF
Input. See V
RST/C2CK
P0.0/V
V
GND
P1.7
P1.6
P1.5
P0.2
P0.1
REGIN
V
REF
DD
REF
1
2
3
4
5
6
7
8
9
10
Section.
20
19
18
17
16
15
14
13
12
11
P1.1
P0.6/C2D
P0.3/TX
P0.4/RX
P0.5
P0.7/XTAL1
P1.0/XTAL2
P1.2/CNVSTR
P1.3
P1.4
DD
monitor.
RE-