IS43R16800C-5TL ISSI, Integrated Silicon Solution Inc, IS43R16800C-5TL Datasheet - Page 34

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IS43R16800C-5TL

Manufacturer Part Number
IS43R16800C-5TL
Description
IC DDR SDRAM 128MBIT 66TSOP
Manufacturer
ISSI, Integrated Silicon Solution Inc
Datasheet

Specifications of IS43R16800C-5TL

Format - Memory
RAM
Memory Type
DDR SDRAM
Memory Size
128M (8Mx16)
Speed
200MHz
Interface
Parallel
Voltage - Supply
2.3 V ~ 2.7 V
Operating Temperature
0°C ~ 70°C
Package / Case
66-TSOPII
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
IS43R16800C
IC43R16800C
34
A Write command to the consecutive Read command interval: To complete the burst operation
1. Same
2. Same
3. Different
Command
Destination row of the consecutive read
command
Bank
address
Note: tWTR is referenced from the first positive CK edge after the last desired data in pair tWTR.
DQS
/CK
DM
DQ
CK
WRIT
Row address State
Same
Different
Any
t0
in0
t1
ACTIVE
ACTIVE
IDLE
INPUT
BL/2 + 2 cycle
in1
tWRD (min)
NOP
in2
WRITE to READ Command Interval
t2
Operation
To complete the burst operation, the consecutive read command should be
performed tWRD (= BL/ 2 + 2) after the write command.
Precharge the bank tWPD after the preceding write command. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive read command can be issued. See ‘A read command to the
consecutive precharge interval’ section.
To complete a burst operation, the consecutive read command should be
performed tWRD (= BL/ 2 + 2) after the write command.
Precharge the bank independently of the preceding write operation. tRP after the
precharge command, issue the ACT command. tRCD after the ACT command, the
consecutive read command can be issued.
in3
t3
tWTR*
READ
t4
Integrated Silicon Solution, Inc. — www.issi.com
t5
t6
NOP
t7
OUTPUT
out0
out1
t8
BL = 4
CL = 3
out2
Rev. A
10/13/08

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